ACPI: Add acpi_is_wakeup_s3() for romstage

This replaces acpi_is_wakeup_early().

Change-Id: I23112c1fc7b6f99584bc065fbf6b10fb073b1eb6
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8187
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>

4 files changed, 63 insertions, 54 deletions

diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc
index f4a84b7c22..ca3d86ab02 100644
--- a/src/southbridge/amd/cimx/sb800/Makefile.inc
+++ b/src/southbridge/amd/cimx/sb800/Makefile.inc
@@ -34,6 +34,9 @@ ramstage-$(CONFIG_SB800_IMC_FAN_CONTROL) += fan.c
 ramstage-$(CONFIG_SPI_FLASH) += spi.c
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c
 
+romstage-$(CONFIG_HAVE_ACPI_RESUME) += ramtop.c
+ramstage-$(CONFIG_HAVE_ACPI_RESUME) += ramtop.c
+
 romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ../../sb800/enable_usbdebug.c
 ramstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c
 
diff --git a/src/southbridge/amd/cimx/sb800/cfg.c b/src/southbridge/amd/cimx/sb800/cfg.c
index 9ddcf8f314..ac6e6aeb81 100644
--- a/src/southbridge/amd/cimx/sb800/cfg.c
+++ b/src/southbridge/amd/cimx/sb800/cfg.c
@@ -26,48 +26,6 @@
 #include <arch/io.h>
 #include <arch/acpi.h>
 
-#if CONFIG_HAVE_ACPI_RESUME
-int acpi_get_sleep_type(void)
-{
-	u16 tmp = inw(PM1_CNT_BLK_ADDRESS);
-	tmp = ((tmp & (7 << 10)) >> 10);
-	/* printk(BIOS_DEBUG, "SLP_TYP type was %x\n", tmp); */
-	return (int)tmp;
-}
-#endif
-
-#ifndef __PRE_RAM__
-void backup_top_of_ram(uint64_t ramtop)
-{
-	u32 dword = (u32) ramtop;
-	int nvram_pos = 0xf8, i; /* temp */
-	printk(BIOS_DEBUG, "dword=%x\n", dword);
-	for (i = 0; i<4; i++) {
-		printk(BIOS_DEBUG, "nvram_pos=%x, dword>>(8*i)=%x\n", nvram_pos, (dword >>(8 * i)) & 0xff);
-		outb(nvram_pos, BIOSRAM_INDEX);
-		outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
-		nvram_pos++;
-	}
-}
-#endif
-
-#if CONFIG_HAVE_ACPI_RESUME
-unsigned long get_top_of_ram(void)
-{
-	u32 xdata = 0;
-	int xnvram_pos = 0xf8, xi;
-	if (acpi_get_sleep_type() != 3)
-		return 0;
-	for (xi = 0; xi<4; xi++) {
-		outb(xnvram_pos, BIOSRAM_INDEX);
-		xdata &= ~(0xff << (xi * 8));
-		xdata |= inb(BIOSRAM_DATA) << (xi *8);
-		xnvram_pos++;
-	}
-	return (unsigned long) xdata;
-}
-#endif
-
 /**
  * @brief South Bridge CIMx configuration
  *
@@ -80,10 +38,7 @@ void sb800_cimx_config(AMDSBCFG *sb_config)
 	if (!sb_config)
 		return;
 
-#if CONFIG_HAVE_ACPI_RESUME
-	if (acpi_get_sleep_type() == 3)
-		sb_config->S3Resume = 1;
-#endif
+	sb_config->S3Resume = acpi_is_wakeup_s3();
 
 	/* header */
 	sb_config->StdHeader.PcieBasePtr = PCIEX_BASE_ADDRESS;
diff --git a/src/southbridge/amd/cimx/sb800/early.c b/src/southbridge/amd/cimx/sb800/early.c
index 7492f9942d..34375c59e4 100644
--- a/src/southbridge/amd/cimx/sb800/early.c
+++ b/src/southbridge/amd/cimx/sb800/early.c
@@ -20,7 +20,6 @@
 #include <stdint.h>
 #include <device/pci_ids.h>
 #include <arch/io.h>		/* inl, outl */
-#include <arch/acpi.h>
 #include "SBPLATFORM.h"
 #include "sb_cimx.h"
 #include "cfg.h"		/*sb800_cimx_config*/
@@ -74,10 +73,3 @@ void sb800_clk_output_48Mhz(void)
         *(volatile u32 *)(ACPI_MMIO_BASE + MISC_BASE + 0x40) &= ~((1 << 0) | (1 << 2)); /* 48Mhz */
         *(volatile u32 *)(ACPI_MMIO_BASE + MISC_BASE + 0x40) |= 1 << 1; /* 48Mhz */
 }
-
-#if CONFIG_HAVE_ACPI_RESUME
-int acpi_is_wakeup_early(void)
-{
-	return (acpi_get_sleep_type() == 3);
-}
-#endif
diff --git a/src/southbridge/amd/cimx/sb800/ramtop.c b/src/southbridge/amd/cimx/sb800/ramtop.c
new file mode 100644
index 0000000000..7e9abaeced
--- /dev/null
+++ b/src/southbridge/amd/cimx/sb800/ramtop.c
@@ -0,0 +1,59 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2010 Advanced Micro Devices, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <stdint.h>
+#include <arch/io.h>
+#include <arch/acpi.h>
+#include <cbmem.h>
+#include "SBPLATFORM.h"
+
+int acpi_get_sleep_type(void)
+{
+	u16 tmp = inw(PM1_CNT_BLK_ADDRESS);
+	tmp = ((tmp & (7 << 10)) >> 10);
+	return (int)tmp;
+}
+
+#ifndef __PRE_RAM__
+void backup_top_of_ram(uint64_t ramtop)
+{
+	u32 dword = (u32) ramtop;
+	int nvram_pos = 0xf8, i; /* temp */
+	for (i = 0; i<4; i++) {
+		outb(nvram_pos, BIOSRAM_INDEX);
+		outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
+		nvram_pos++;
+	}
+}
+#endif
+
+unsigned long get_top_of_ram(void)
+{
+	u32 xdata = 0;
+	int xnvram_pos = 0xf8, xi;
+	if (acpi_get_sleep_type() != 3)
+		return 0;
+	for (xi = 0; xi<4; xi++) {
+		outb(xnvram_pos, BIOSRAM_INDEX);
+		xdata &= ~(0xff << (xi * 8));
+		xdata |= inb(BIOSRAM_DATA) << (xi *8);
+		xnvram_pos++;
+	}
+	return (unsigned long) xdata;
+}