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authorZheng Bao <fishbaozi@gmail.com>2012-08-27 17:45:01 +0800
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2012-08-30 05:26:15 +0200
commiteb1d39bac4d3638d41fc38274ae7a133d7b5c6f2 (patch)
tree30a5d945f53576ddfccbbc0c5c9099809593578b /src/southbridge/amd/cimx/sb900
parent83a6dbd006a3afec979d8bb7316834fcb54e003b (diff)
AMD S3: The offset of the nv storage depends on config.h
Change-Id: Ic8410fb706dce677c7218d19030d84b64cda7b7f Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/1485 Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com> Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb900')
-rwxr-xr-xsrc/southbridge/amd/cimx/sb900/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/southbridge/amd/cimx/sb900/Kconfig b/src/southbridge/amd/cimx/sb900/Kconfig
index 253d73f393..acc369e667 100755
--- a/src/southbridge/amd/cimx/sb900/Kconfig
+++ b/src/southbridge/amd/cimx/sb900/Kconfig
@@ -52,5 +52,14 @@ config ACPI_SCI_IRQ
config BOOTBLOCK_SOUTHBRIDGE_INIT
string
default "southbridge/amd/cimx/sb900/bootblock.c"
+
+config S3_VOLATILE_POS
+ hex "S3 volatile storage position"
+ default 0xFFFF0000
+ depends on HAVE_ACPI_RESUME
+ help
+ For a system with S3 feature, the BIOS needs to save some data to
+ non-volitile storage at cold boot stage.
+
endif #SOUTHBRIDGE_AMD_CIMX_SB900