diff options
| author | Aaron Durbin <adurbin@chromium.org> | 2014-01-30 22:20:01 -0600 |
|---|---|---|
| committer | Aaron Durbin <adurbin@google.com> | 2014-02-11 22:23:15 +0100 |
| commit | d907a3402e347633bac09013050a3d290c27d1f8 (patch) | |
| tree | 1953b397aafc0816d2e1ed332ba06aedee98b88f /src/southbridge/amd/cimx/sb900 | |
| parent | 6ecdb68562989aec1362e3a99f3ed2e0012e1191 (diff) | |
amd/cimx: fix sb(8|9)00 NULL type redefine
It is inappropriate for chipset code to be redefining
types -- especially NULL to a non-pointer type. There's
only one non-straight forward change. A condition
being checked was '!ptr_type == NULL' (0 as int). That
check is actually 'ptr_type != NULL'.
Change-Id: Iab5733e5a573baba6fec94e0c955ba4fad72c836
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/5088
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/southbridge/amd/cimx/sb900')
| -rw-r--r-- | src/southbridge/amd/cimx/sb900/SbPlatform.h | 6 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb900/cfg.c | 6 |
2 files changed, 4 insertions, 8 deletions
diff --git a/src/southbridge/amd/cimx/sb900/SbPlatform.h b/src/southbridge/amd/cimx/sb900/SbPlatform.h index 5e419787ca..176ad87eb4 100644 --- a/src/southbridge/amd/cimx/sb900/SbPlatform.h +++ b/src/southbridge/amd/cimx/sb900/SbPlatform.h @@ -24,11 +24,7 @@ #ifndef _AMD_SBPLATFORM_H_ #define _AMD_SBPLATFORM_H_ -//#include "cbtypes.h" -#ifdef NULL - #undef NULL -#endif -#define NULL 0 +#include <stddef.h> typedef unsigned long long PLACEHOLDER; diff --git a/src/southbridge/amd/cimx/sb900/cfg.c b/src/southbridge/amd/cimx/sb900/cfg.c index 58c0abe095..ac7e5512d9 100644 --- a/src/southbridge/amd/cimx/sb900/cfg.c +++ b/src/southbridge/amd/cimx/sb900/cfg.c @@ -178,7 +178,7 @@ void sb900_cimx_config(AMDSBCFG *sb_config) // sb_config->HpetMsiDis = 0; // Field Retired // sb_config->ResetCpuOnSyncFlood = 0; // Field Retired // sb_config->PcibAutoClkCtr = 0; // Field Retired - sb_config->OEMPROGTBL.OemProgrammingTablePtr = NULL; // Board Level + sb_config->OEMPROGTBL.OemProgrammingTablePtr = (uintptr_t)NULL; // Board Level sb_config->PORTCONFIG[0].PortCfg.PortPresent = SB_GPP_PORT0; // Board Level sb_config->PORTCONFIG[0].PortCfg.PortDetected = 0; // CIMx Internal Used sb_config->PORTCONFIG[0].PortCfg.PortIsGen2 = 0; // CIMx Internal Used @@ -213,7 +213,7 @@ void sb900_cimx_config(AMDSBCFG *sb_config) sb_config->GppHardwareDowngrade = INCHIP_GPP_HARDWARE_DOWNGRADE;// Internal Option sb_config->GppToggleReset = INCHIP_GPP_TOGGLE_RESET; // External Option sb_config->sdbEnable = 0; // CIMx Internal Used - sb_config->TempMMIO = NULL; // CIMx Internal Used + sb_config->TempMMIO = (typeof(sb_config->TempMMIO))NULL; // CIMx Internal Used // sb_config->GecPhyStatus = INCHIP_GEC_PHY_STATUS; // Field Retired sb_config->SBGecPwr = INCHIP_GEC_POWER_POLICY; // Internal Option sb_config->SBGecDebugBus = INCHIP_GEC_DEBUGBUS; // Internal Option @@ -296,7 +296,7 @@ void SbPowerOnInit_Config(AMDSBCFG *sb_config) sb_config->SATAMODE.SataMode.SataClkMode = SATA_CLK_RESERVED; // Internal Option sb_config->NbSbGen2 = NB_SB_GEN2; // External Option sb_config->SataInternal100Spread = INCHIP_SATA_INTERNAL_100_SPREAD; // External Option - sb_config->OEMPROGTBL.OemProgrammingTablePtr = NULL; // Board Level + sb_config->OEMPROGTBL.OemProgrammingTablePtr = (uintptr_t)NULL; // Board Level sb_config->sdbEnable = 0; // CIMx Internal Used sb_config->Cg2Pll = INCHIP_CG2_PLL; // Internal Option |