diff options
| author | Joe Moore <awokd@danwin1210.me> | 2019-10-21 01:03:08 -0600 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-20 13:23:01 +0000 |
| commit | 2c08ea7cfcb24240e41ad0f75be35f9e2967b3d1 (patch) | |
| tree | 533803d91d10448590e070353c5303483df2e6b3 /src/southbridge/amd/cimx/sb900/amd_pci_int_types.h | |
| parent | dc0b1875a9196e593d9f25c4edbfd3b37c93e727 (diff) | |
cpu/nb/sb: Remove fam12
With removal of Torpedo mainboard, this code is no longer
necessary. This also removes fam12 support from northbridge
and SB900 from southbridge.
Change-Id: I8a30461278844d0d9ad4320f0e952774c4fd644f
Signed-off-by: Joe Moore <awokd@danwin1210.me>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36188
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb900/amd_pci_int_types.h')
| -rw-r--r-- | src/southbridge/amd/cimx/sb900/amd_pci_int_types.h | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/src/southbridge/amd/cimx/sb900/amd_pci_int_types.h b/src/southbridge/amd/cimx/sb900/amd_pci_int_types.h deleted file mode 100644 index 300969ddde..0000000000 --- a/src/southbridge/amd/cimx/sb900/amd_pci_int_types.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Sage Electronic Engineering, LLC. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef AMD_PCI_INT_TYPES_H -#define AMD_PCI_INT_TYPES_H - -const char *intr_types[] = { - [0x00] = "INTA#\t", "INTB#\t", "INTC#\t", "INTD#\t", "INTE#\t", "INTF#\t", "INTG#\t", "INTH#\t", - [0x08] = "Misc\t", "Misc0\t", "Misc1\t", "Misc2\t", "Ser IRQ INTA", "Ser IRQ INTB", "Ser IRQ INTC", "Ser IRQ INTD", - [0x10] = "SCI\t", "SMBUS0\t", "ASF\t", "HDA\t", "FC\t\t", "GEC\t", "PerMon\t", - [0x20] = "IMC INT0\t", "IMC INT1\t", "IMC INT2\t", "IMC INT3\t", "IMC INT4\t", "IMC INT5\t", - [0x30] = "Dev18.0 INTA", "Dev18.2 INTB", "Dev19.0 INTA", "Dev19.2 INTB", "Dev22.0 INTA", "Dev22.2 INTB", "Dev20.5 INTC", - [0x40] = "IDE\t", "SATA\t", - [0x50] = "GPPInt0\t", "GPPInt1\t", "GPPInt2\t", "GPPInt3\t" -}; - -#endif /* AMD_PCI_INT_TYPES_H */ |