diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2020-08-07 22:30:04 +0200 |
|---|---|---|
| committer | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-06-06 08:58:30 +0000 |
| commit | b97a303fa69f54e8a880f5c4607d8ee9c9173b16 (patch) | |
| tree | 53d0fc9897f3e08ca04344b5ac60a42955625700 /src/southbridge/amd/cimx/sb800 | |
| parent | 750d57ff5dd7f7412c4526c87191bd1378a49d4a (diff) | |
cpu/amd/agesa: Use common MRC_CACHE code to save S3 data
Use the common code to save data for fast boot or S3 resume.
An notable improvement that comes with this, is that the same 4K page
is not rewritten all the time. This prolongs the hardware's life.
TESTED on pcengines/apu1 and lenovo/g505s: S3 resume works fine.
Change-Id: I0f4f36dcead52a6c550fb5e606772e0a99029872
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44295
Reviewed-by: Mike Banon <mikebdp2@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800')
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index fcfdfb4a68..7ab2cc1c07 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -11,6 +11,7 @@ config SOUTHBRIDGE_AMD_CIMX_SB800 select SOC_AMD_COMMON_BLOCK_ACPIMMIO select SOC_AMD_COMMON_BLOCK_ACPIMMIO_BIOSRAM select SOC_AMD_COMMON_BLOCK_PCI_MMCONF + select BOOT_DEVICE_SUPPORTS_WRITES if SOUTHBRIDGE_AMD_CIMX_SB800 config ENABLE_IDE_COMBINED_MODE |