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authorMichał Żygowski <michal.zygowski@3mdeb.com>2019-11-28 12:59:44 +0100
committerPatrick Georgi <pgeorgi@google.com>2019-12-02 12:59:45 +0000
commit2317b4f1140821051d8688a95fcfd7e0eedaa773 (patch)
tree500c2cb36d49213f0b038c0737affeb9a6e4e232 /src/southbridge/amd/cimx/sb800
parent00517b687a03d6c9a760669c8fe1e89af2fc3884 (diff)
sb/amd/cimx: replace cimx_util with common ACPIMMIO AMD block
Drop the redundant cimx_util, remove the includes when appropriate and replace the implementation with amdblocks/acpimmio where needed. TEST=boot PC Engines apu1 and launch Debian with Linux kernel 4.14.50 Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I66b1f82926372b6ebb570893b6eb73c7f2935b9d Reviewed-on: https://review.coreboot.org/c/coreboot/+/37328 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800')
-rw-r--r--src/southbridge/amd/cimx/sb800/Kconfig3
-rw-r--r--src/southbridge/amd/cimx/sb800/fan.c12
2 files changed, 9 insertions, 6 deletions
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index aa5160b68f..0b790b06dc 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -21,6 +21,9 @@ config SOUTHBRIDGE_AMD_CIMX_SB800
select AMD_SB_CIMX
select HAVE_CF9_RESET
select HAVE_CF9_RESET_PREPARE
+ select SOC_AMD_COMMON
+ select SOC_AMD_COMMON_BLOCK
+ select SOC_AMD_COMMON_BLOCK_ACPIMMIO
if SOUTHBRIDGE_AMD_CIMX_SB800
config BOOTBLOCK_SOUTHBRIDGE_INIT
diff --git a/src/southbridge/amd/cimx/sb800/fan.c b/src/southbridge/amd/cimx/sb800/fan.c
index a8dfa31d9a..42c13d74a7 100644
--- a/src/southbridge/amd/cimx/sb800/fan.c
+++ b/src/southbridge/amd/cimx/sb800/fan.c
@@ -13,7 +13,7 @@
* GNU General Public License for more details.
*/
-#include <southbridge/amd/cimx/cimx_util.h>
+#include <amdblocks/acpimmio.h>
#include <device/device.h>
#include <device/pci.h> /* device_operations */
#include <device/pci_ops.h>
@@ -31,27 +31,27 @@ void init_sb800_MANUAL_fans(struct device *dev)
/* Init Fan 0 */
if (sb_chip->fan0_enabled)
for (i = 0; i < FAN_REGISTER_COUNT; i++)
- pm2_iowrite(FAN_0_OFFSET + i, sb_chip->fan0_config_vals[i]);
+ pm2_write8(FAN_0_OFFSET + i, sb_chip->fan0_config_vals[i]);
/* Init Fan 1 */
if (sb_chip->fan1_enabled)
for (i = 0; i < FAN_REGISTER_COUNT; i++)
- pm2_iowrite(FAN_1_OFFSET + i, sb_chip->fan1_config_vals[i]);
+ pm2_write8(FAN_1_OFFSET + i, sb_chip->fan1_config_vals[i]);
/* Init Fan 2 */
if (sb_chip->fan2_enabled)
for (i = 0; i < FAN_REGISTER_COUNT; i++)
- pm2_iowrite(FAN_2_OFFSET + i, sb_chip->fan2_config_vals[i]);
+ pm2_write8(FAN_2_OFFSET + i, sb_chip->fan2_config_vals[i]);
/* Init Fan 3 */
if (sb_chip->fan3_enabled)
for (i = 0; i < FAN_REGISTER_COUNT; i++)
- pm2_iowrite(FAN_3_OFFSET + i, sb_chip->fan3_config_vals[i]);
+ pm2_write8(FAN_3_OFFSET + i, sb_chip->fan3_config_vals[i]);
/* Init Fan 4 */
if (sb_chip->fan4_enabled)
for (i = 0; i < FAN_REGISTER_COUNT; i++)
- pm2_iowrite(FAN_4_OFFSET + i, sb_chip->fan4_config_vals[i]);
+ pm2_write8(FAN_4_OFFSET + i, sb_chip->fan4_config_vals[i]);
}