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authorFelix Held <felix-coreboot@felixheld.de>2020-11-23 16:24:29 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-11-30 16:27:52 +0000
commit21cdf0de086e045988b93b6030f8faa5127f5cdf (patch)
tree99a0b31c112d7385a00cf6f264ebede643fff9ea /src/southbridge/amd/cimx/sb800
parent4b84a2c8a2db0998406abd5ed304814a5f2110a3 (diff)
soc/amd/common: introduce SOC_AMD_COMMON_BLOCK_PCI_MMCONF
Add a Kconfig symbol for including the PCIe MMCONF setup function in the build and select it when SOC_AMD_COMMON_BLOCK_PCI is selected and in the southbridges call enable_pci_mmconf(), but don't select SOC_AMD_COMMON_BLOCK_PCI. Change-Id: I32de7450bff5b231442f9f2094a18ebe01874ee7 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/47878 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800')
-rw-r--r--src/southbridge/amd/cimx/sb800/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig
index 96737cfbb6..ecfc1e1c5f 100644
--- a/src/southbridge/amd/cimx/sb800/Kconfig
+++ b/src/southbridge/amd/cimx/sb800/Kconfig
@@ -10,6 +10,7 @@ config SOUTHBRIDGE_AMD_CIMX_SB800
select HAVE_CF9_RESET_PREPARE
select SOC_AMD_COMMON
select SOC_AMD_COMMON_BLOCK_ACPIMMIO
+ select SOC_AMD_COMMON_BLOCK_PCI_MMCONF
if SOUTHBRIDGE_AMD_CIMX_SB800
config ENABLE_IDE_COMBINED_MODE