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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-06-06 14:34:57 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-10-17 18:09:57 +0000
commit253c356c2bca2a9552a42ea4dd38c71a639877a4 (patch)
tree8b7a94e9f10e1291adcd7d1236c7f8ac7261a158 /src/southbridge/amd/cimx/sb800
parent6644d7c508a1a15d5a0c79f47cdf09585c99192f (diff)
sb/amd/cimx/sb800: Clear IOAPIC vectors only once
Change-Id: I640d17cdee2bdaa4fe7049ce66a327b58924bc6f Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55288 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800')
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 9fdf596cbd..b6cc3c777b 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -340,7 +340,6 @@ static void sb800_enable(struct device *dev)
break;
case PCI_DEVFN(0x14, 0): /* 0:14:0 SMBUS */
- clear_ioapic(VIO_APIC_VADDR);
/* Assign the ioapic ID the next available number after the processor core local APIC IDs */
setup_ioapic(VIO_APIC_VADDR, CONFIG_MAX_CPUS);
break;