diff options
author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-08-19 21:40:21 +0200 |
---|---|---|
committer | Michael Niewöhner <foss@mniewoehner.de> | 2020-09-21 16:29:35 +0000 |
commit | 131d9f5190a1e5b6fd5a47fecbe5f7eef002c0ef (patch) | |
tree | accfc86126dba3bf22fe731689ee791894a3bcaa /src/southbridge/amd/cimx/sb800 | |
parent | b69bbfe1ef52421f0bbe1e632d99dc264660ee02 (diff) |
src/southbridge: Drop unneeded empty lines
Change-Id: I02aa1e2a9a9061b34b91f832d96123a8595d61b7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44592
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800')
-rw-r--r-- | src/southbridge/amd/cimx/sb800/Amd.h | 1 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/SBPLATFORM.h | 1 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/fadt.c | 3 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/fan.c | 8 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/fan.h | 1 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/late.c | 3 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/sb_cimx.h | 1 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/smbus.c | 1 | ||||
-rw-r--r-- | src/southbridge/amd/cimx/sb800/spi.c | 1 |
9 files changed, 0 insertions, 20 deletions
diff --git a/src/southbridge/amd/cimx/sb800/Amd.h b/src/southbridge/amd/cimx/sb800/Amd.h index b931cf05ab..c5ca8b40d9 100644 --- a/src/southbridge/amd/cimx/sb800/Amd.h +++ b/src/southbridge/amd/cimx/sb800/Amd.h @@ -83,7 +83,6 @@ typedef struct _AMD_CONFIG_PARAMS { IN OUT unsigned int Reserved[2]; ///< This space is reserved for future use. } AMD_CONFIG_PARAMS; - /// AGESA Binary module header structure typedef struct _AMD_IMAGE_HEADER { IN unsigned int Signature; ///< Binary Signature diff --git a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h index 1bcfd6647d..99c7323033 100644 --- a/src/southbridge/amd/cimx/sb800/SBPLATFORM.h +++ b/src/southbridge/amd/cimx/sb800/SBPLATFORM.h @@ -48,7 +48,6 @@ typedef union _PCI_ADDR { #include <OEM.h> /* platform default configuration */ #include <AMD.h> - //------------------------------------------------------------------------------------------------------------------------// /** * SB_CIMx_PARAMETER 0 1 2 Default Value When CIMx Take over diff --git a/src/southbridge/amd/cimx/sb800/fadt.c b/src/southbridge/amd/cimx/sb800/fadt.c index a5c27d6525..9272194442 100644 --- a/src/southbridge/amd/cimx/sb800/fadt.c +++ b/src/southbridge/amd/cimx/sb800/fadt.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - /* * ACPI - create the Fixed ACPI Description Tables (FADT) */ @@ -112,7 +111,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm2_cnt_blk.addrl = ACPI_PMA_CNT_BLK_ADDRESS; fadt->x_pm2_cnt_blk.addrh = 0x0; - fadt->x_pm_tmr_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_pm_tmr_blk.bit_width = 32; fadt->x_pm_tmr_blk.bit_offset = 0; @@ -120,7 +118,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->x_pm_tmr_blk.addrl = PM1_TMR_BLK_ADDRESS; fadt->x_pm_tmr_blk.addrh = 0x0; - fadt->x_gpe0_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_gpe0_blk.bit_width = 64; /* EventStatus + Event Enable */ fadt->x_gpe0_blk.bit_offset = 0; diff --git a/src/southbridge/amd/cimx/sb800/fan.c b/src/southbridge/amd/cimx/sb800/fan.c index 34c32f53a7..bbba3fa083 100644 --- a/src/southbridge/amd/cimx/sb800/fan.c +++ b/src/southbridge/amd/cimx/sb800/fan.c @@ -39,12 +39,10 @@ void init_sb800_MANUAL_fans(struct device *dev) if (sb_chip->fan4_enabled) for (i = 0; i < FAN_REGISTER_COUNT; i++) pm2_write8(FAN_4_OFFSET + i, sb_chip->fan4_config_vals[i]); - } void init_sb800_IMC_fans(struct device *dev) { - AMDSBCFG sb_config; unsigned char *message_ptr; int i; @@ -63,7 +61,6 @@ void init_sb800_IMC_fans(struct device *dev) pci_write_config16(dev, 0xA4, sb_chip->imc_port_address | 0x01); - /* * Do an initial manual setup of the fans for things like polarity * and frequency. @@ -107,7 +104,6 @@ if (sb_chip->imc_fan_zone0_enabled) { message_ptr = &sb_config.Pecstruct.MSGFun85zone0MSGREG2; for (i = 0; i < IMC_FAN_SPEED_COUNT; i++) *(message_ptr + i) = sb_chip->imc_zone0_fanspeeds[i]; - } /* @@ -138,10 +134,8 @@ if (sb_chip->imc_fan_zone1_enabled) { message_ptr = &sb_config.Pecstruct.MSGFun85zone1MSGREG2; for (i = 0; i < IMC_FAN_SPEED_COUNT; i++) *(message_ptr + i) = sb_chip->imc_zone1_fanspeeds[i]; - } - /* ********** Zone 2 ********** */ @@ -170,7 +164,6 @@ if (sb_chip->imc_fan_zone2_enabled) { message_ptr = &sb_config.Pecstruct.MSGFun85zone2MSGREG2; for (i = 0; i < IMC_FAN_SPEED_COUNT; i++) *(message_ptr + i) = sb_chip->imc_zone2_fanspeeds[i]; - } /* @@ -202,7 +195,6 @@ if (sb_chip->imc_fan_zone3_enabled) { message_ptr = &sb_config.Pecstruct.MSGFun85zone3MSGREG2; for (i = 0; i < IMC_FAN_SPEED_COUNT; i++) *(message_ptr + i) = sb_chip->imc_zone3_fanspeeds[i]; - } /* diff --git a/src/southbridge/amd/cimx/sb800/fan.h b/src/southbridge/amd/cimx/sb800/fan.h index 5a02543260..d11fbcfc66 100644 --- a/src/southbridge/amd/cimx/sb800/fan.h +++ b/src/southbridge/amd/cimx/sb800/fan.h @@ -70,7 +70,6 @@ void init_sb800_MANUAL_fans(struct device *dev); #define FREQ_14HZ 0xFE #define FREQ_11HZ 0xFF - /* IMC Fan Control Definitions */ #define IMC_MODE1_FAN_ENABLED ( 1 << 0 ) #define IMC_MODE1_FAN_IMC_CONTROLLED ( 1 << 2 ) diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index 43a88b7cd0..15e6d67c0c 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -213,7 +213,6 @@ static const struct pci_driver usb_ohci4_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_USB_20_5, /* OHCI-USB4 */ }; - static struct device_operations azalia_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, @@ -227,7 +226,6 @@ static const struct pci_driver azalia_driver __pci_driver = { .device = PCI_DEVICE_ID_ATI_SB800_HDA, }; - static struct device_operations gec_ops = { .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, @@ -358,7 +356,6 @@ static void sb800_enable(struct device *dev) } break; - case PCI_DEVFN(0x14, 3): /* 0:14:3 LPC */ /* Initialize the fans */ #if CONFIG(SB800_IMC_FAN_CONTROL) diff --git a/src/southbridge/amd/cimx/sb800/sb_cimx.h b/src/southbridge/amd/cimx/sb800/sb_cimx.h index 11b24afdd9..5e5ca5d5f5 100644 --- a/src/southbridge/amd/cimx/sb800/sb_cimx.h +++ b/src/southbridge/amd/cimx/sb800/sb_cimx.h @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - #ifndef _CIMX_H_ #define _CIMX_H_ diff --git a/src/southbridge/amd/cimx/sb800/smbus.c b/src/southbridge/amd/cimx/sb800/smbus.c index 86bde267ff..7d1ffb981e 100644 --- a/src/southbridge/amd/cimx/sb800/smbus.c +++ b/src/southbridge/amd/cimx/sb800/smbus.c @@ -1,6 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */ - #include <arch/io.h> #include "smbus.h" #include <console/console.h> /* printk */ diff --git a/src/southbridge/amd/cimx/sb800/spi.c b/src/southbridge/amd/cimx/sb800/spi.c index 4a66a4b043..468ae23393 100644 --- a/src/southbridge/amd/cimx/sb800/spi.c +++ b/src/southbridge/amd/cimx/sb800/spi.c @@ -105,7 +105,6 @@ static void ImcSleep(void) WaitForEcLDN9MailboxCmdAck(); } - static void ImcWakeup(void) { u8 cmd_val = 0x96; /* Kick off IMC Mailbox command 96 */ |