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authorAngel Pons <th3fanbus@gmail.com>2021-06-16 12:39:23 +0200
committerWerner Zeh <werner.zeh@siemens.com>2021-06-21 04:25:51 +0000
commit12d31b2764851f119985192419d2c986b48b54e0 (patch)
tree9e4f08efbaf5fbd39a49978b2b1ba064db2119e6 /src/southbridge/amd/cimx/sb800
parent621ed4c06c8c8761e083c550c0edf3c9c66793c9 (diff)
southbridge/amd: Create ACPI MCFG MMCONFIG
These southbridges are paired with MMCONF-enabled northbridges. Change-Id: I0416de6425bb57471856731ad12ce8194ac98be2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55572 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800')
-rw-r--r--src/southbridge/amd/cimx/sb800/late.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c
index 15e6d67c0c..9fdf596cbd 100644
--- a/src/southbridge/amd/cimx/sb800/late.c
+++ b/src/southbridge/amd/cimx/sb800/late.c
@@ -123,7 +123,9 @@ static void lpc_init(struct device *dev)
unsigned long acpi_fill_mcfg(unsigned long current)
{
- /* Just a dummy */
+ current += acpi_create_mcfg_mmconfig((acpi_mcfg_mmconfig_t *)current,
+ CONFIG_MMCONF_BASE_ADDRESS, 0, 0, CONFIG_MMCONF_BUS_NUMBER - 1);
+
return current;
}