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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-04-15 20:07:53 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-05-18 06:48:57 +0200 |
| commit | 61be3603f4b9f353e605d7b7c8d0d9f3b90f5636 (patch) | |
| tree | 0de776853b482a83faff1ca5bbfdc2df243f7214 /src/southbridge/amd/cimx/sb800 | |
| parent | 17bb225be7dd031b9803f33dec88e9d53e3a582f (diff) | |
AGESA: Fix UMA calculations
Vendorcode decides already in AMD_INIT_POST the exact location
of UMA memory. To meet alignment requirements, it will extend
uma_memory_size. We cannot calculate base from size and TOP_MEM1,
but need to calculate size from base and TOP_MEM1 instead.
Also allows selection of UmaMode==UMA_SPECIFIED to manually set
amount of memory reserved for framebuffer.
Change-Id: I2514c70a331c7fbf0056f22bf64f19c9374754c0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/19328
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800')
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/Makefile.inc | 4 | ||||
| -rw-r--r-- | src/southbridge/amd/cimx/sb800/ramtop.c | 12 |
2 files changed, 4 insertions, 12 deletions
diff --git a/src/southbridge/amd/cimx/sb800/Makefile.inc b/src/southbridge/amd/cimx/sb800/Makefile.inc index 7c31278f2a..0511fb3074 100644 --- a/src/southbridge/amd/cimx/sb800/Makefile.inc +++ b/src/southbridge/amd/cimx/sb800/Makefile.inc @@ -30,8 +30,8 @@ ramstage-$(CONFIG_SB800_IMC_FAN_CONTROL) += fan.c ramstage-$(CONFIG_SPI_FLASH) += spi.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += fadt.c -romstage-$(CONFIG_HAVE_ACPI_RESUME) += ramtop.c -ramstage-$(CONFIG_HAVE_ACPI_RESUME) += ramtop.c +romstage-y += ramtop.c +ramstage-y += ramtop.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ../../sb800/enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += ../../sb800/enable_usbdebug.c diff --git a/src/southbridge/amd/cimx/sb800/ramtop.c b/src/southbridge/amd/cimx/sb800/ramtop.c index 44a49600ac..4d5b9a8a62 100644 --- a/src/southbridge/amd/cimx/sb800/ramtop.c +++ b/src/southbridge/amd/cimx/sb800/ramtop.c @@ -26,27 +26,21 @@ int acpi_get_sleep_type(void) return (int)tmp; } -#if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) - -#ifndef __PRE_RAM__ void backup_top_of_ram(uint64_t ramtop) { - u32 dword = (u32) ramtop; + u32 dword = ramtop; int nvram_pos = 0xf8, i; /* temp */ for (i = 0; i < 4; i++) { outb(nvram_pos, BIOSRAM_INDEX); - outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA); + outb((dword >> (8 * i)) & 0xff, BIOSRAM_DATA); nvram_pos++; } } -#endif unsigned long get_top_of_ram(void) { u32 xdata = 0; int xnvram_pos = 0xf8, xi; - if (acpi_get_sleep_type() != 3) - return 0; for (xi = 0; xi < 4; xi++) { outb(xnvram_pos, BIOSRAM_INDEX); xdata &= ~(0xff << (xi * 8)); @@ -55,5 +49,3 @@ unsigned long get_top_of_ram(void) } return (unsigned long) xdata; } - -#endif |