diff options
author | zbao <fishbaozi@gmail.com> | 2012-04-05 13:18:49 +0800 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-04-12 00:14:58 +0200 |
commit | 9bcdbf8eaa0c73d130ba555163f89fa1759c8c99 (patch) | |
tree | c8d480f7e75444037a5ba491ea3987282e2faa21 /src/southbridge/amd/cimx/sb800/lpc.c | |
parent | 2c2e78d845cd28eb3b11c87fa3feafaf836cda7a (diff) |
Add Southbridge support for S3.
1. Add some CIMX call for S3.
2. Detect sleep type.
Change-Id: I62888e8d8a03987ca88f5c935fa660f6b49a4fe9
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/621
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/cimx/sb800/lpc.c')
-rw-r--r-- | src/southbridge/amd/cimx/sb800/lpc.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/southbridge/amd/cimx/sb800/lpc.c b/src/southbridge/amd/cimx/sb800/lpc.c index 856b8b32eb..59d74c0737 100644 --- a/src/southbridge/amd/cimx/sb800/lpc.c +++ b/src/southbridge/amd/cimx/sb800/lpc.c @@ -21,7 +21,9 @@ #include <device/pci.h> #include <arch/ioapic.h> #include "lpc.h" - +#include <bitops.h> +#include <arch/io.h> +#include <cbmem.h> void lpc_read_resources(device_t dev) { |