diff options
| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-06-24 19:15:09 -0500 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-11-15 02:43:22 +0100 |
| commit | eb2f6fff3265b5be87e2dfc9e69ad465c742ec8c (patch) | |
| tree | e4416a4bad6419eea3e8415b35c82a16fc304cbf /src/southbridge/amd/amd8132 | |
| parent | 876bdd4ab3591079d3ffa5b9b0fb6080098ea769 (diff) | |
northbridge/amd/amdmct/mct_ddr3: Fix lockups and wasted time during ECC init
The existing ECC initialization algorithm contained several bugs on both
Family 10h and Family 15h processors, including activation of ECC scrub
before DRAM setup was completed, in violation of both BKDG and errata
recommendations.
Change-Id: I09a8ea83024186b7ece7d78a4bef1201ab34ff8a
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/12002
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/southbridge/amd/amd8132')
0 files changed, 0 insertions, 0 deletions