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authorMartin Roth <martin.roth@se-eng.com>2014-12-16 20:53:49 -0700
committerMartin Roth <gaumless@gmail.com>2014-12-17 16:55:44 +0100
commit55e31a9e335943ef26d182ade53103df367e8745 (patch)
tree1505b4bccfc7c1f93d8f5a96420c88cf0ed06a9a /src/southbridge/amd/amd8132/bridge.c
parentdcf253c74e3eb88e738f425c9a9bfd897736c2b0 (diff)
southbridge/amd amd81XX, cs553X & sr5650 spelling fixes
Trivial fixes, but the editor highlights them, and it's easy to go through a bunch of files while I'm otherwise idle. Change-Id: Ice5d8ce9408356c866a9a2ee5a03f704f55ddc2a Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7842 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/southbridge/amd/amd8132/bridge.c')
-rw-r--r--src/southbridge/amd/amd8132/bridge.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/amd/amd8132/bridge.c b/src/southbridge/amd/amd8132/bridge.c
index 88e421e7cc..eecb11b0e8 100644
--- a/src/southbridge/amd/amd8132/bridge.c
+++ b/src/southbridge/amd/amd8132/bridge.c
@@ -263,7 +263,7 @@ static void amd8132_pcix_init(device_t dev)
pci_write_config32(dev, 0x48, dword);
dword = pci_read_config32(dev, 0x4c);
- dword |= (1<<6); //intial prefetch for memory read line request
+ dword |= (1<<6); //Initial prefetch for memory read line request
dword |= (1<<9); //continuous prefetch Enable for memory read line request
pci_write_config32(dev, 0x4c, dword);