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| author | Ronald G. Minnich <rminnich@gmail.com> | 2003-07-25 03:05:54 +0000 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2003-07-25 03:05:54 +0000 |
| commit | ebb645a9fb5d81a8ea701fd53a2bf63bb899d51c (patch) | |
| tree | 0e3d1fd63952a0f3715d567f5194e23a23f59a6e /src/southbridge/amd/amd8131 | |
| parent | feaa75960cf1e731934d95b5e954d213bc72becf (diff) | |
YhLu's changes to resolve several memory and other problems.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/amd8131')
| -rw-r--r-- | src/southbridge/amd/amd8131/amd8131_bridge.c | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/src/southbridge/amd/amd8131/amd8131_bridge.c b/src/southbridge/amd/amd8131/amd8131_bridge.c index ded5480234..ba90cad974 100644 --- a/src/southbridge/amd/amd8131/amd8131_bridge.c +++ b/src/southbridge/amd/amd8131/amd8131_bridge.c @@ -12,12 +12,11 @@ static void pcix_init(device_t dev) uint16_t word; uint8_t byte; - /* Enable memory write and invalidate ??? */ byte = pci_read_config8(dev, 0x04); byte |= 0x10; pci_write_config8(dev, 0x04, byte); - + /* Set drive strength */ word = pci_read_config16(dev, 0xe0); word = 0x0404; @@ -30,7 +29,7 @@ static void pcix_init(device_t dev) word = pci_read_config16(dev, 0xe8); word = 0x0404; pci_write_config16(dev, 0xe8, word); - + return; } @@ -58,6 +57,14 @@ static void ioapic_enable(device_t dev) value &= ~((1 << 1) | (1 << 0)); } pci_write_config32(dev, 0x44, value); + +//BY LYH + value = pci_read_config32(dev, 0x4); + value |= 6; + pci_write_config32(dev, 0x4, value); +//BY LYH END + + } static struct device_operations ioapic_ops = { |