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authorMartin Roth <martinroth@google.com>2017-06-24 21:30:14 -0600
committerMartin Roth <martinroth@google.com>2017-06-30 03:44:59 +0000
commit083504b66b5f3b281221f0a8f4fd62a4d9071287 (patch)
treedcf6fcb31f5d7ee760634c86b0fc06a7383e6d94 /src/southbridge/amd/amd8111
parent5f9c6734fc9bbe69c007c46c8ec6f314bd5522a8 (diff)
southbridge/amd: add IS_ENABLED() around Kconfig symbol references
Change-Id: I8fabb7331435eb518a5c95cb29c4ff5ca98560d2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/20349 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Diffstat (limited to 'src/southbridge/amd/amd8111')
-rw-r--r--src/southbridge/amd/amd8111/acpi.c4
-rw-r--r--src/southbridge/amd/amd8111/lpc.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/amd/amd8111/acpi.c b/src/southbridge/amd/amd8111/acpi.c
index 2a6cf8d33d..fd3fe49895 100644
--- a/src/southbridge/amd/amd8111/acpi.c
+++ b/src/southbridge/amd/amd8111/acpi.c
@@ -89,7 +89,7 @@ static int lsmbus_block_write(device_t dev, uint8_t cmd, u8 bytes, const u8 *buf
}
-#if CONFIG_HAVE_ACPI_TABLES
+#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
unsigned pm_base;
#endif
@@ -161,7 +161,7 @@ static void acpi_init(struct device *dev)
(on*12)+(on>>1),(on&1)*5);
}
-#if CONFIG_HAVE_ACPI_TABLES
+#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
pm_base = pci_read_config16(dev, 0x58) & 0xff00;
printk(BIOS_DEBUG, "pm_base: 0x%04x\n",pm_base);
#endif
diff --git a/src/southbridge/amd/amd8111/lpc.c b/src/southbridge/amd/amd8111/lpc.c
index 8841760c02..00c56f6a1e 100644
--- a/src/southbridge/amd/amd8111/lpc.c
+++ b/src/southbridge/amd/amd8111/lpc.c
@@ -129,7 +129,7 @@ unsigned long acpi_fill_mcfg(unsigned long current)
}
static void southbridge_acpi_fill_ssdt_generator(device_t device) {
-#if CONFIG_SET_FIDVID
+#if IS_ENABLED(CONFIG_SET_FIDVID)
amd_generate_powernow(pm_base + 0x10, 6, 1);
acpigen_write_mainboard_resources("\\_SB.PCI0.MBRS", "_CRS");
#endif