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authorArthur Heymans <arthur@aheymans.xyz>2019-11-19 15:59:51 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-20 18:59:44 +0000
commitb274ccf59670c9110c75edbe563e6d5287d4604d (patch)
tree819ef70555d4eaaa49dc2633f09c78fd6b2d0099 /src/southbridge/amd/amd8111/reset.c
parentf2e42c4a8ec75c162251c72df8ac3da12e8a3eb9 (diff)
sb/amd/amd8111: Remove support
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are now mandatory features, which this platform lacks. Change-Id: I5d7f3bfca47b86e4fd761f9462bc7297b487fdee Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36964 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/amd8111/reset.c')
-rw-r--r--src/southbridge/amd/amd8111/reset.c59
1 files changed, 0 insertions, 59 deletions
diff --git a/src/southbridge/amd/amd8111/reset.c b/src/southbridge/amd/amd8111/reset.c
deleted file mode 100644
index b175be2727..0000000000
--- a/src/southbridge/amd/amd8111/reset.c
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-
-#define __SIMPLE_DEVICE__
-
-#include <device/pci_ops.h>
-#include <reset.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-
-
-#define PCI_DEV_INVALID (0xffffffffU)
-static pci_devfn_t pci_io_locate_device_on_bus(unsigned int pci_id, unsigned int bus)
-{
- pci_devfn_t dev, last;
- dev = PCI_DEV(bus, 0, 0);
- last = PCI_DEV(bus, 31, 7);
- for (; dev <= last; dev += PCI_DEV(0,0,1)) {
- unsigned int id;
- id = pci_io_read_config32(dev, 0);
- if (id == pci_id) {
- return dev;
- }
- }
- return PCI_DEV_INVALID;
-}
-
-#include "../../../northbridge/amd/amdk8/reset_test.c"
-
-void do_board_reset(void)
-{
- pci_devfn_t dev;
- unsigned int bus;
- unsigned int node = 0;
- unsigned int link = get_sblk();
-
- /* Find the device.
- * There can only be one 8111 on a hypertransport chain/bus.
- */
- bus = node_link_to_bus(node, link);
- dev = pci_io_locate_device_on_bus(
- PCI_ID(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8111_ISA),
- bus);
-
- /* Reset */
- set_bios_reset();
- pci_io_write_config8(dev, 0x47, 1);
-}