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author | Jason Schildt <jschildt@gmail.com> | 2005-10-13 00:44:34 +0000 |
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committer | Jason Schildt <jschildt@gmail.com> | 2005-10-13 00:44:34 +0000 |
commit | ab327a3c08a1bd8b33f09827a5f10d91ddb8727d (patch) | |
tree | 861618c481c5c3f3c421a0cc901dd1a2d66d5dad /src/southbridge/amd/amd8111/amd8111_pci.c | |
parent | 6ab43fcc48992d46096842b17a00dd51dd835c69 (diff) |
- Added explanation of device tree enable.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2052 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/amd/amd8111/amd8111_pci.c')
-rw-r--r-- | src/southbridge/amd/amd8111/amd8111_pci.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111_pci.c b/src/southbridge/amd/amd8111/amd8111_pci.c index 9fe1f98d32..b9a9b3578d 100644 --- a/src/southbridge/amd/amd8111/amd8111_pci.c +++ b/src/southbridge/amd/amd8111/amd8111_pci.c @@ -55,6 +55,7 @@ static struct device_operations pci_ops = { .enable_resources = pci_bus_enable_resources, .init = pci_init, .scan_bus = pci_scan_bridge, + /* PCI Subordinate bus reset is not implemented */ .ops_pci = &lops_pci, }; |