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authorMartin Roth <martin@coreboot.org>2019-10-23 21:46:03 -0600
committerPatrick Georgi <pgeorgi@google.com>2019-10-30 11:16:56 +0000
commitff744bf0eee875a03dc98dd6792e3ed0ff4456a0 (patch)
tree691260ffe71abac0bb8e2a5607b0d6f1cfb16028 /src/southbridge/amd/amd8111/amd8111.c
parent5331a7cff9ebf6f92542eee53e6556a4d5a0dc75 (diff)
src/southbridge: change "unsigned" to "unsigned int"
Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Iee2056a50a1201626fa29194afdbfc1f11094420 Reviewed-on: https://review.coreboot.org/c/coreboot/+/36333 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/amd8111/amd8111.c')
-rw-r--r--src/southbridge/amd/amd8111/amd8111.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/amd/amd8111/amd8111.c b/src/southbridge/amd/amd8111/amd8111.c
index cbf0d30859..0180f45653 100644
--- a/src/southbridge/amd/amd8111/amd8111.c
+++ b/src/southbridge/amd/amd8111/amd8111.c
@@ -21,15 +21,15 @@ void amd8111_enable(struct device *dev)
{
struct device *lpc_dev;
struct device *bus_dev;
- unsigned index;
- unsigned reg_old, reg;
+ unsigned int index;
+ unsigned int reg_old, reg;
/* See if we are on the bus behind the amd8111 pci bridge */
bus_dev = dev->bus->dev;
if ((bus_dev->vendor == PCI_VENDOR_ID_AMD) &&
(bus_dev->device == PCI_DEVICE_ID_AMD_8111_PCI))
{
- unsigned devfn;
+ unsigned int devfn;
devfn = bus_dev->path.pci.devfn + (1 << 3);
lpc_dev = pcidev_path_behind(bus_dev->bus, devfn);
index = ((dev->path.pci.devfn & ~7) >> 3) + 8;
@@ -37,7 +37,7 @@ void amd8111_enable(struct device *dev)
index = 16;
}
} else {
- unsigned devfn;
+ unsigned int devfn;
devfn = (dev->path.pci.devfn) & ~7;
lpc_dev = pcidev_path_behind(dev->bus, devfn);
index = dev->path.pci.devfn & 7;