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authorElyes HAOUAS <ehaouas@noos.fr>2018-10-17 10:56:26 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-23 15:52:09 +0000
commita342f3937e7ce159fd170ab8cd26ba799a3bc9e4 (patch)
tree4bd4540ba11286f465272c1fbee62dbf5f9789f8 /src/southbridge/amd/amd8111/acpi.c
parent9856892297ad997f586a1b4dd0a494f3764a0ce2 (diff)
src: Remove unneeded whitespace
Change-Id: I6c77f4289b46646872731ef9c20dc115f0cf876d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/29161 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/amd8111/acpi.c')
-rw-r--r--src/southbridge/amd/amd8111/acpi.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/amd/amd8111/acpi.c b/src/southbridge/amd/amd8111/acpi.c
index 0948683b31..da7a1d8086 100644
--- a/src/southbridge/amd/amd8111/acpi.c
+++ b/src/southbridge/amd/amd8111/acpi.c
@@ -168,17 +168,17 @@ static void acpi_init(struct device *dev)
on = SLOW_CPU_OFF;
get_option(&on, "slow_cpu");
if (on) {
- pm10_bar = (pci_read_config16(dev, 0x58)&0xff00);
- outl(((on<<1)+0x10) ,(pm10_bar + 0x10));
+ pm10_bar = (pci_read_config16(dev, 0x58) & 0xff00);
+ outl(((on << 1) + 0x10), (pm10_bar + 0x10));
inl(pm10_bar + 0x10);
on = 8-on;
printk(BIOS_DEBUG, "Throttling CPU %2d.%1.1d percent.\n",
- (on*12)+(on>>1),(on&1)*5);
+ (on * 12) + (on >> 1), (on & 1) * 5);
}
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
pm_base = pci_read_config16(dev, 0x58) & 0xff00;
- printk(BIOS_DEBUG, "pm_base: 0x%04x\n",pm_base);
+ printk(BIOS_DEBUG, "pm_base: 0x%04x\n", pm_base);
#endif
}