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authorElyes HAOUAS <ehaouas@noos.fr>2016-09-18 19:18:56 +0200
committerMartin Roth <martinroth@google.com>2016-09-20 17:15:32 +0200
commitc021ffee45f7b19b3a8e6c426e0d14a4609bf593 (patch)
tree6c6a5667ccd217f5272f178271d360947eae1231 /src/southbridge/amd/agesa
parentbf7faa1a634e8bed0d0a8b6634dfe10f42ab986c (diff)
southbridge/amd: Add space around operators
Change-Id: I949ff7de072e5e0753d9c8ff0bf98abfca25798b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16637 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/amd/agesa')
-rw-r--r--src/southbridge/amd/agesa/hudson/early_setup.c4
-rw-r--r--src/southbridge/amd/agesa/hudson/enable_usbdebug.c4
-rw-r--r--src/southbridge/amd/agesa/hudson/imc.c6
-rw-r--r--src/southbridge/amd/agesa/hudson/ramtop.c4
4 files changed, 9 insertions, 9 deletions
diff --git a/src/southbridge/amd/agesa/hudson/early_setup.c b/src/southbridge/amd/agesa/hudson/early_setup.c
index 1cdaa056b8..a5f46bec24 100644
--- a/src/southbridge/amd/agesa/hudson/early_setup.c
+++ b/src/southbridge/amd/agesa/hudson/early_setup.c
@@ -94,7 +94,7 @@ int s3_save_nvram_early(u32 dword, int size, int nvram_pos)
int i;
printk(BIOS_DEBUG, "Writing %x of size %d to nvram pos: %d\n", dword, size, nvram_pos);
- for (i = 0; i<size; i++) {
+ for (i = 0; i < size; i++) {
outb(nvram_pos, BIOSRAM_INDEX);
outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
nvram_pos++;
@@ -107,7 +107,7 @@ int s3_load_nvram_early(int size, u32 *old_dword, int nvram_pos)
{
u32 data = *old_dword;
int i;
- for (i = 0; i<size; i++) {
+ for (i = 0; i < size; i++) {
outb(nvram_pos, BIOSRAM_INDEX);
data &= ~(0xff << (i * 8));
data |= inb(BIOSRAM_DATA) << (i *8);
diff --git a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
index 5874c37691..fce7f5b33b 100644
--- a/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
+++ b/src/southbridge/amd/agesa/hudson/enable_usbdebug.c
@@ -26,9 +26,9 @@
pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
{
- if (hcd_idx==3)
+ if (hcd_idx == 3)
return PCI_DEV(0, 0x16, 2);
- else if (hcd_idx==2)
+ else if (hcd_idx == 2)
return PCI_DEV(0, 0x13, 2);
else
return PCI_DEV(0, 0x12, 2);
diff --git a/src/southbridge/amd/agesa/hudson/imc.c b/src/southbridge/amd/agesa/hudson/imc.c
index 4da6814c68..049eca95ff 100644
--- a/src/southbridge/amd/agesa/hudson/imc.c
+++ b/src/southbridge/amd/agesa/hudson/imc.c
@@ -66,12 +66,12 @@ void enable_imc_thermal_zone(void)
regs[0] = 0;
regs[1] = 0;
FunNum = Fun_80;
- for (i=0; i<=1; i++)
+ for (i = 0; i <= 1; i++)
WriteECmsg(MSG_REG0 + i, AccessWidth8, &regs[i], &StdHeader);
WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader); // function number
WaitForEcLDN9MailboxCmdAck(&StdHeader);
- for (i=2; i<=9; i++)
+ for (i = 2; i <= 9; i++)
ReadECmsg(MSG_REG0 + i, AccessWidth8, &regs[i], &StdHeader);
/* enable thermal zone 0 */
@@ -79,7 +79,7 @@ void enable_imc_thermal_zone(void)
regs[0] = 0;
regs[1] = 0;
FunNum = Fun_81;
- for (i=0; i<=9; i++)
+ for (i = 0; i <= 9; i++)
WriteECmsg(MSG_REG0 + i, AccessWidth8, &regs[i], &StdHeader);
WriteECmsg(MSG_SYS_TO_IMC, AccessWidth8, &FunNum, &StdHeader); // function number
WaitForEcLDN9MailboxCmdAck(&StdHeader);
diff --git a/src/southbridge/amd/agesa/hudson/ramtop.c b/src/southbridge/amd/agesa/hudson/ramtop.c
index e76a0c4249..567cd12979 100644
--- a/src/southbridge/amd/agesa/hudson/ramtop.c
+++ b/src/southbridge/amd/agesa/hudson/ramtop.c
@@ -33,7 +33,7 @@ void backup_top_of_ram(uint64_t ramtop)
{
u32 dword = (u32) ramtop;
int nvram_pos = 0xf8, i; /* temp */
- for (i = 0; i<4; i++) {
+ for (i = 0; i < 4; i++) {
outb(nvram_pos, BIOSRAM_INDEX);
outb((dword >>(8 * i)) & 0xff , BIOSRAM_DATA);
nvram_pos++;
@@ -47,7 +47,7 @@ unsigned long get_top_of_ram(void)
int xnvram_pos = 0xf8, xi;
if (acpi_get_sleep_type() != 3)
return 0;
- for (xi = 0; xi<4; xi++) {
+ for (xi = 0; xi < 4; xi++) {
outb(xnvram_pos, BIOSRAM_INDEX);
xdata &= ~(0xff << (xi * 8));
xdata |= inb(BIOSRAM_DATA) << (xi *8);