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authorAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-17 23:33:50 -0500
committerAlexandru Gagniuc <mr.nuke.me@gmail.com>2014-04-18 21:58:39 +0200
commit599d668cdd8438820d9ca8f54826163662b2a6f0 (patch)
tree451bc1fdf8c75df6b7aca379f9d940f227c8e27c /src/southbridge/amd/agesa/hudson/smi.c
parent2ad6ee97638e24db67a02fdb2431fe6a56d7c24d (diff)
southbridge/hudson: Compile refactored SMI setup utilities in SMM
Refactor hudson_enable_gevent_smi() to allow configuring the interrupt mode and trigger level. Move the utilities which are useful in SMM to a separate file that is included in both ramstage and SMM. This is useful for SMI handlers which need to enable or disable GEVENT SMIs on-the-fly. A follow-up patch makes use of this infrastructure. Change-Id: Ifa4c300c00c178b18d7280690cfc4b8367c669b8 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/170 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@gmail.com>
Diffstat (limited to 'src/southbridge/amd/agesa/hudson/smi.c')
-rw-r--r--src/southbridge/amd/agesa/hudson/smi.c43
1 files changed, 0 insertions, 43 deletions
diff --git a/src/southbridge/amd/agesa/hudson/smi.c b/src/southbridge/amd/agesa/hudson/smi.c
index 168f2acb4a..1d58afe3f8 100644
--- a/src/southbridge/amd/agesa/hudson/smi.c
+++ b/src/southbridge/amd/agesa/hudson/smi.c
@@ -10,8 +10,6 @@
#include <console/console.h>
#include <cpu/cpu.h>
-#define HUDSON_SMI_ACPI_COMMAND 75
-
void smm_setup_structures(void *gnvs, void *tcg, void *smi1)
{
printk(BIOS_DEBUG, "smm_setup_structures STUB!!!\n");
@@ -25,44 +23,3 @@ void hudson_enable_smi_generation(void)
reg |= SMITRG0_EOS; /* Set EOS bit */
smi_write32(SMI_REG_SMITRIG0, reg);
}
-
-static void enable_smi(uint8_t smi_num)
-{
- uint8_t reg32_offset, bit_offset;
- uint32_t reg32;
-
- /* SMI sources range from [0:149] */
- if (smi_num > 149) {
- printk(BIOS_WARNING, "BUG: Invalid SMI: %u\n", smi_num);
- return;
- }
-
- /* 16 sources per register, 2 bits per source; registers are 4 bytes */
- reg32_offset = (smi_num / 16) * 4;
- bit_offset = (smi_num % 16) * 2;
-
- reg32 = smi_read32(SMI_REG_CONTROL0 + reg32_offset);
- reg32 &= ~(3 << (bit_offset));
- reg32 |= (SMI_SRC_MODE_SMI << (bit_offset));
- smi_write32(SMI_REG_CONTROL0 + reg32_offset, reg32);
-
-}
-
-/** Enable generation of SMIs for given GPE */
-void hudson_enable_gevent_smi(uint8_t gevent)
-{
- /* GEVENT pins range from [0:23] */
- if (gevent > 23) {
- printk(BIOS_WARNING, "BUG: Invalid GEVENT: %u\n", gevent);
- return;
- }
-
- /* SMI0 source is GEVENT0 and so on */
- enable_smi(gevent);
-}
-
-/** Enable SMIs on writes to ACPI SMI command port */
-void hudson_enable_acpi_cmd_smi(void)
-{
- enable_smi(HUDSON_SMI_ACPI_COMMAND);
-}