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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-12-15 21:37:48 +0200
committerPatrick Georgi <pgeorgi@google.com>2019-12-20 18:14:34 +0000
commit520717dff196e1d1ed61f72a8abadbc114ee6ba1 (patch)
tree5658d5fb27c6f5901c9b714fd1c6839ed36e28f9 /src/southbridge/amd/agesa/hudson/bootblock.c
parentb9bd69e70ed355d89ff41d66ed7134338c5986fe (diff)
AGESA,binaryPI: Drop remains of ROMCC_BOOTBLOCK
Change-Id: I507ac6d483d9854852d6d01f10544c450b8d33cc Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37440 Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/amd/agesa/hudson/bootblock.c')
-rw-r--r--src/southbridge/amd/agesa/hudson/bootblock.c21
1 files changed, 5 insertions, 16 deletions
diff --git a/src/southbridge/amd/agesa/hudson/bootblock.c b/src/southbridge/amd/agesa/hudson/bootblock.c
index 4da030b89a..517b928d8d 100644
--- a/src/southbridge/amd/agesa/hudson/bootblock.c
+++ b/src/southbridge/amd/agesa/hudson/bootblock.c
@@ -14,7 +14,10 @@
*/
#include <stdint.h>
+#include <arch/bootblock.h>
+#include <amdblocks/acpimmio.h>
#include <device/pci_ops.h>
+#include <southbridge/amd/agesa/hudson/hudson.h>
/*
* Enable 4MB (LPC) ROM access at 0xFFC00000 - 0xFFFFFFFF.
@@ -56,24 +59,12 @@ static void hudson_enable_rom(void)
pci_io_write_config16(dev, 0x6e, 0xffff);
}
-static void bootblock_southbridge_init(void)
-{
- hudson_enable_rom();
-}
-
-
-#if !CONFIG(ROMCC_BOOTBLOCK)
-
-#include <bootblock_common.h>
-#include <amdblocks/acpimmio.h>
-#include <southbridge/amd/agesa/hudson/hudson.h>
-
-void bootblock_soc_early_init(void)
+void bootblock_early_southbridge_init(void)
{
pci_devfn_t dev;
u32 data;
- bootblock_southbridge_init();
+ hudson_enable_rom();
enable_acpimmio_decode_pm24();
hudson_lpc_decode();
@@ -94,7 +85,6 @@ void bootblock_soc_early_init(void)
* Enable decoding of legacy TPM addresses: IO addresses 0x7f-
* 0x7e and 0xef-0xee.
*/
-
data = pci_read_config32(dev, LPC_TRUSTED_PLATFORM_MODULE);
data |= TPM_12_EN | TPM_LEGACY_EN;
pci_write_config32(dev, LPC_TRUSTED_PLATFORM_MODULE, data);
@@ -109,4 +99,3 @@ void bootblock_soc_early_init(void)
*/
pm_write8(0xd2, 0);
}
-#endif