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author | Zheng Bao <fishbaozi@gmail.com> | 2012-11-28 11:36:52 +0800 |
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committer | Marc Jones <marcj303@gmail.com> | 2012-11-30 20:03:31 +0100 |
commit | 7bcffa511dee2782702cc2920580d15b34073e1c (patch) | |
tree | 3b3e494d83c6ab44abfd5402f9a98ff970e91f5d /src/southbridge/amd/Kconfig | |
parent | 78a1667cbc0a26c09079c81aa7b8f4387c5f3774 (diff) |
AMD S3: Leverage the public SPI routine
Remove the old, unflexible code for storing S3 data in SPI flash.
Refer to flashrom. Tested on Parmer.
Change-Id: I60a10476befb4afab2b4241f01a988f4a8bb22cd
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/1920
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/southbridge/amd/Kconfig')
-rw-r--r-- | src/southbridge/amd/Kconfig | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/southbridge/amd/Kconfig b/src/southbridge/amd/Kconfig index 867afcaf8b..20d557307a 100644 --- a/src/southbridge/amd/Kconfig +++ b/src/southbridge/amd/Kconfig @@ -14,3 +14,7 @@ source src/southbridge/amd/sb800/Kconfig source src/southbridge/amd/cimx/Kconfig source src/southbridge/amd/agesa/Kconfig source src/southbridge/amd/sr5650/Kconfig + +config SPI_FLASH + bool + default y if HAVE_ACPI_RESUME && CPU_AMD_AGESA |