diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2021-06-18 16:33:49 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-06-21 15:15:09 +0000 |
| commit | ea668d74f390dd058625e85dbefe89eef4ba6245 (patch) | |
| tree | 5b2f113c4e7d441ee44d28d8178d43c1d888ccb1 /src/soc | |
| parent | d6d87767cbf65f0da46bff32534b9718adcc332b (diff) | |
soc/amd/cezanne/fsp_m_params: set SATA enable UPD from devicetree info
Currently the FSP only has one switch to disable both AHCI controllers.
If at least one of the two AHCI controller devices is enabled in the
board's devicetree, set the SATA enable UPD to 1 and otherwise set it to
0. Setting the UPD value to 0 when both AHCI controllers are disabled
saves around 60ms in boot time.
BUG=b:191385289
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I84e7c8bf2ab08c8254271ddfefd2e4e7d8c2e87b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55669
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Matt Papageorge <matthewpapa07@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/cezanne/fsp_m_params.c | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/fsp_m_params.c b/src/soc/amd/cezanne/fsp_m_params.c index 9546721f0e..5601568d30 100644 --- a/src/soc/amd/cezanne/fsp_m_params.c +++ b/src/soc/amd/cezanne/fsp_m_params.c @@ -36,6 +36,41 @@ static bool devtree_gfx_hda_dev_enabled(void) return gfx_hda_dev->enabled; } +static const struct device_path sata0_path[] = { + { + .type = DEVICE_PATH_PCI, + .pci.devfn = PCIE_GPP_B_DEVFN + }, + { + .type = DEVICE_PATH_PCI, + .pci.devfn = SATA0_DEVFN + }, +}; + +static const struct device_path sata1_path[] = { + { + .type = DEVICE_PATH_PCI, + .pci.devfn = PCIE_GPP_B_DEVFN + }, + { + .type = DEVICE_PATH_PCI, + .pci.devfn = SATA1_DEVFN + }, +}; + +static bool devtree_sata_dev_enabled(void) +{ + const struct device *ahci0_dev, *ahci1_dev; + + ahci0_dev = find_dev_nested_path(pci_root_bus(), sata0_path, ARRAY_SIZE(sata0_path)); + ahci1_dev = find_dev_nested_path(pci_root_bus(), sata1_path, ARRAY_SIZE(sata1_path)); + + if (!ahci0_dev || !ahci1_dev) + return false; + + return ahci0_dev->enabled || ahci1_dev->enabled; +} + __weak void mb_pre_fspm(void) { } @@ -167,6 +202,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) mcfg->pspp_policy = config->pspp_policy; mcfg->enable_nb_azalia = devtree_gfx_hda_dev_enabled(); + mcfg->sata_enable = devtree_sata_dev_enabled(); if (config->usb_phy_custom) mcfg->usb_phy = (struct usb_phy_config *)&config->usb_phy; |