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authorAamir Bohra <aamir.bohra@intel.com>2018-05-29 10:52:33 +0530
committerSubrata Banik <subrata.banik@intel.com>2018-05-30 04:18:00 +0000
commite462585c9446cecb6f8cf06f62311c6ef18a4cbf (patch)
tree42ce4cb99a129e3eabd1f17e19c5fc7baa655e28 /src/soc
parentb81362a82e40fac5c6debd8e0034feacb00d5e0a (diff)
soc/intel/cannonlake: Enable IDT and expection handling support for all stages
Change-Id:I4146a040e5e43bed7ccc6cb0a7dc2271f1e7a8ea Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/26661 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/cannonlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index a095fb9f1f..3b6837448d 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -26,6 +26,7 @@ config CPU_SPECIFIC_OPTIONS
select HAVE_INTEL_FIRMWARE
select HAVE_MONOTONIC_TIMER
select HAVE_SMI_HANDLER
+ select IDT_IN_EVERY_STAGE
select INTEL_GMA_ACPI
select INTEL_GMA_ADD_VBT_DATA_FILE if RUN_FSP_GOP
select IOAPIC