diff options
| author | Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> | 2022-01-13 10:07:09 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-18 16:15:26 +0000 |
| commit | dbe92ead87f045aa33c4811be3ac77f17ba68413 (patch) | |
| tree | 3a1afc5aaa1be1440d8b3d25a67270d2c0a306e3 /src/soc | |
| parent | eed82d181b5ce14ea41b8dfeccb68596cb6d005d (diff) | |
soc/intel/alderlake: Add eMMC device into chipset.cb
Add eMMC device into chipset.cb and keep it `off` by default.
eMMC device is applicable only for Alder Lake N SOC.
Change-Id: I2bc38ee5814688409feb7e4531c1daa5b54953c0
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61065
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Kangheui Won <khwon@chromium.org>
Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/alderlake/chipset.cb | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb index c956fd4826..e02cdadb74 100644 --- a/src/soc/intel/alderlake/chipset.cb +++ b/src/soc/intel/alderlake/chipset.cb @@ -185,6 +185,8 @@ chip soc/intel/alderlake device pci 19.0 alias i2c4 off end device pci 19.1 alias i2c5 off end device pci 19.2 alias uart2 off end + # eMMC device is applicable only for ADL-N + device pci 1a.0 alias emmc off end device pci 1c.0 alias pcie_rp1 off end device pci 1c.1 alias pcie_rp2 off end device pci 1c.2 alias pcie_rp3 off end |