soc/mediatek/common: Refactor EINT driver

Refactor EINT driver by
- Move `pos_bit_calc_for_eint` to `common/gpio_eint_v1.c` and rename to
  `gpio_calc_eint_pos_bit`.
- Implement `gpio_get_eint_reg` to obtain EINT base address.

This change is prepared for the driver change in MT8196.

BUG=b:334723688
TEST=EINT works on Geralt

Change-Id: Ie53abc23971bfa39250ebd7dd48e28d6b91c5973
Signed-off-by: Yidi Lin <yidilin@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83703
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

8 files changed, 40 insertions, 22 deletions

diff --git a/src/soc/mediatek/common/gpio.c b/src/soc/mediatek/common/gpio.c
index e8a50b2b18..bbfbb3d175 100644
--- a/src/soc/mediatek/common/gpio.c
+++ b/src/soc/mediatek/common/gpio.c
@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
+#include <assert.h>
 #include <device/mmio.h>
 #include <gpio.h>
 
@@ -113,23 +114,16 @@ void gpio_output(gpio_t gpio, int value)
 	gpio_set_mode(gpio, GPIO_MODE);
 }
 
-enum {
-	MAX_EINT_REG_BITS = 32,
-};
-
-static void pos_bit_calc_for_eint(gpio_t gpio, u32 *pos, u32 *bit)
-{
-	*pos = gpio.id / MAX_EINT_REG_BITS;
-	*bit = gpio.id % MAX_EINT_REG_BITS;
-}
-
 int gpio_eint_poll(gpio_t gpio)
 {
 	u32 pos;
 	u32 bit;
 	u32 status;
+	struct eint_regs *mtk_eint;
 
-	pos_bit_calc_for_eint(gpio, &pos, &bit);
+	gpio_calc_eint_pos_bit(gpio, &pos, &bit);
+	mtk_eint = gpio_get_eint_reg(gpio);
+	assert(mtk_eint);
 
 	status = (read32(&mtk_eint->sta.regs[pos]) >> bit) & 0x1;
 
@@ -143,8 +137,12 @@ void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type)
 {
 	u32 pos;
 	u32 bit, mask;
+	struct eint_regs *mtk_eint;
+
+	gpio_calc_eint_pos_bit(gpio, &pos, &bit);
+	mtk_eint = gpio_get_eint_reg(gpio);
+	assert(mtk_eint);
 
-	pos_bit_calc_for_eint(gpio, &pos, &bit);
 	mask = 1 << bit;
 
 	/* Make it an input first. */
diff --git a/src/soc/mediatek/common/gpio_eint_v1.c b/src/soc/mediatek/common/gpio_eint_v1.c
new file mode 100644
index 0000000000..194dff45ad
--- /dev/null
+++ b/src/soc/mediatek/common/gpio_eint_v1.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/addressmap.h>
+#include <gpio.h>
+
+void gpio_calc_eint_pos_bit(gpio_t gpio, u32 *pos, u32 *bit)
+{
+	*pos = gpio.id / MAX_EINT_REG_BITS;
+	*bit = gpio.id % MAX_EINT_REG_BITS;
+}
+
+struct eint_regs *gpio_get_eint_reg(gpio_t gpio)
+{
+	return (struct eint_regs *)(EINT_BASE);
+}
diff --git a/src/soc/mediatek/common/include/soc/gpio_common.h b/src/soc/mediatek/common/include/soc/gpio_common.h
index b12d9c92c5..870dac59ea 100644
--- a/src/soc/mediatek/common/include/soc/gpio_common.h
+++ b/src/soc/mediatek/common/include/soc/gpio_common.h
@@ -102,8 +102,6 @@ struct eint_regs {
 
 check_member(eint_regs, d1en, 0x420);
 
-static struct eint_regs *const mtk_eint = (void *)(EINT_BASE);
-
 /*
  * Firmware never enables interrupts on this platform.  This function
  * reads current EINT status and clears the pending interrupt.
@@ -117,4 +115,11 @@ int gpio_eint_poll(gpio_t gpio);
  */
 void gpio_eint_configure(gpio_t gpio, enum gpio_irq_type type);
 
+enum {
+	MAX_EINT_REG_BITS = 32,
+};
+
+void gpio_calc_eint_pos_bit(gpio_t gpio, u32 *pos, u32 *bit);
+struct eint_regs *gpio_get_eint_reg(gpio_t gpio);
+
 #endif
diff --git a/src/soc/mediatek/mt8183/Makefile.mk b/src/soc/mediatek/mt8183/Makefile.mk
index 3b4a1e8ccb..775cdea7c9 100644
--- a/src/soc/mediatek/mt8183/Makefile.mk
+++ b/src/soc/mediatek/mt8183/Makefile.mk
@@ -3,7 +3,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8183),y)
 
 bootblock-y += bootblock.c
 bootblock-y += ../common/auxadc.c
-bootblock-y += ../common/gpio.c gpio.c
+bootblock-y += ../common/gpio_eint_v1.c ../common/gpio.c gpio.c
 bootblock-y += ../common/pll.c pll.c
 bootblock-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
 bootblock-y += mt8183.c
@@ -17,7 +17,7 @@ decompressor-y += ../common/mmu_operations.c
 decompressor-y += ../common/timer.c
 
 verstage-y += ../common/auxadc.c
-verstage-y += ../common/gpio.c gpio.c
+verstage-y += ../common/gpio_eint_v1.c ../common/gpio.c gpio.c
 verstage-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
 verstage-y += mt8183.c
 verstage-y += ../common/i2c.c i2c.c
@@ -34,7 +34,7 @@ romstage-y += dramc_pi_calibration_api.c
 romstage-y += memory.c
 romstage-$(CONFIG_MEMORY_TEST) += ../common/memory_test.c
 romstage-y += mt8183.c
-romstage-y += ../common/gpio.c gpio.c
+romstage-y += ../common/gpio_eint_v1.c ../common/gpio.c gpio.c
 romstage-y += ../common/mmu_operations.c mmu_operations.c
 romstage-y += ../common/pll.c pll.c
 romstage-y += ../common/pmic_wrap.c pmic_wrap.c mt6358.c
@@ -50,7 +50,7 @@ ramstage-y += emi.c
 ramstage-y += ../common/auxadc.c
 ramstage-y += ../common/ddp.c ddp.c
 ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c
-ramstage-y += ../common/gpio.c gpio.c
+ramstage-y += ../common/gpio_eint_v1.c ../common/gpio.c gpio.c
 ramstage-y += ../common/i2c.c i2c.c
 ramstage-y += ../common/mcu.c
 ramstage-y += ../common/mmu_operations.c mmu_operations.c
diff --git a/src/soc/mediatek/mt8186/Makefile.mk b/src/soc/mediatek/mt8186/Makefile.mk
index 8e116f82e6..f637dcf0f6 100644
--- a/src/soc/mediatek/mt8186/Makefile.mk
+++ b/src/soc/mediatek/mt8186/Makefile.mk
@@ -4,7 +4,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8186),y)
 # for bootblock, verstage, romstage, ramstage
 all-y += ../common/cpu_id.c
 all-y += ../common/flash_controller.c
-all-y += ../common/gpio.c ../common/gpio_op.c  gpio.c
+all-y += ../common/gpio_eint_v1.c ../common/gpio.c ../common/gpio_op.c  gpio.c
 all-y += ../common/i2c.c i2c.c
 all-y += ../common/pll.c pll.c
 all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
diff --git a/src/soc/mediatek/mt8188/Makefile.mk b/src/soc/mediatek/mt8188/Makefile.mk
index f67c82741e..6a57da49db 100644
--- a/src/soc/mediatek/mt8188/Makefile.mk
+++ b/src/soc/mediatek/mt8188/Makefile.mk
@@ -2,7 +2,7 @@
 ifeq ($(CONFIG_SOC_MEDIATEK_MT8188),y)
 
 all-y += ../common/flash_controller.c
-all-y += ../common/gpio.c ../common/gpio_op.c gpio.c
+all-y += ../common/gpio_eint_v1.c ../common/gpio.c ../common/gpio_op.c gpio.c
 all-y += ../common/i2c.c i2c.c
 all-y += ../common/pll.c pll.c
 all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
diff --git a/src/soc/mediatek/mt8192/Makefile.mk b/src/soc/mediatek/mt8192/Makefile.mk
index 5d4b87b51e..4e35fe104f 100644
--- a/src/soc/mediatek/mt8192/Makefile.mk
+++ b/src/soc/mediatek/mt8192/Makefile.mk
@@ -3,7 +3,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8192),y)
 
 # for bootblock, verstage, romstage, ramstage
 all-y += ../common/flash_controller.c
-all-y += ../common/gpio.c ../common/gpio_op.c gpio.c
+all-y += ../common/gpio_eint_v1.c ../common/gpio.c ../common/gpio_op.c gpio.c
 all-y += ../common/i2c.c i2c.c
 all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
 all-y += ../common/timer.c
diff --git a/src/soc/mediatek/mt8195/Makefile.mk b/src/soc/mediatek/mt8195/Makefile.mk
index 56a10bc2f2..d1c1920482 100644
--- a/src/soc/mediatek/mt8195/Makefile.mk
+++ b/src/soc/mediatek/mt8195/Makefile.mk
@@ -3,7 +3,7 @@ ifeq ($(CONFIG_SOC_MEDIATEK_MT8195),y)
 
 # for bootblock, verstage, romstage, ramstage
 all-y += ../common/flash_controller.c
-all-y += ../common/gpio.c ../common/gpio_op.c gpio.c
+all-y += ../common/gpio_eint_v1.c ../common/gpio.c ../common/gpio_op.c gpio.c
 all-y += ../common/i2c.c i2c.c
 all-$(CONFIG_SPI_FLASH) += ../common/spi.c spi.c
 all-y += ../common/timer.c ../common/timer_prepare.c