diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2021-05-05 13:30:10 -0600 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-05-06 23:30:55 +0000 |
| commit | d2d762a4c96587a8197a8e11706bda24e7a2200f (patch) | |
| tree | 2d5bd5d24468f4152bea351fc5007f90fcca6818 /src/soc | |
| parent | afe1fe55eb346cc5bee097dee75f5ccbe3b62df4 (diff) | |
soc/amd/common/espi: Print set eSPI peripheral config
This will print the config we are setting on the eSPI peripheral.
e.g.,
Setting general configuration: slave: 0x98a00000 controller: 0xe2000000
eSPI Slave configuration:
CRC checking enabled
Dedicated Alert# used to signal alert event
eSPI quad IO mode selected
Only eSPI single IO mode supported
Alert# pin is open-drain
eSPI 33MHz selected
eSPI up to 20MHz supported
Maximum Wait state: 0
BUG=b:187122344, b:186135022
TEST=Boot guybrush
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I1a2382d8ab3d3f0d14a139c57470cb895112eca9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52952
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Rob Barnes <robbarnes@google.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/common/block/lpc/espi_util.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/lpc/espi_util.c b/src/soc/amd/common/block/lpc/espi_util.c index 7752eb5670..ade1aaa60f 100644 --- a/src/soc/amd/common/block/lpc/espi_util.c +++ b/src/soc/amd/common/block/lpc/espi_util.c @@ -705,6 +705,8 @@ static int espi_set_general_configuration(const struct espi_config *mb_cfg, uint printk(BIOS_INFO, "Setting general configuration: slave: 0x%x controller: 0x%x\n", slave_config, ctrlr_config); + espi_show_slave_general_configuration(slave_config); + if (espi_set_configuration(ESPI_SLAVE_GENERAL_CFG, slave_config) == -1) return -1; |