diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2021-11-10 13:09:20 -0700 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-11-12 14:55:29 +0000 |
| commit | c0025c25f3dd4d72f04fa7f5b4c5fbb8459d3be7 (patch) | |
| tree | 685cc96b38bdb58e0b0dc7f85e712bc3711ad0b9 /src/soc | |
| parent | b139e6b2a38373a5769d1273dc04ac0f7b617a53 (diff) | |
soc/amd/common/block/lpc: Set FSP-S/M alignment to 64 when using SPI DMA
This will enable reading FSP-S/M using the SPI DMA controller.
BUG=B:179699789
TEST=Build guybrush with SPI DMA enabled and verify alignment is set
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I282b9989d8e95c93603c6f69616a8f236a4e2e35
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59130
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/common/block/lpc/Kconfig | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/lpc/Kconfig b/src/soc/amd/common/block/lpc/Kconfig index 76f4ec7ac3..64192695c6 100644 --- a/src/soc/amd/common/block/lpc/Kconfig +++ b/src/soc/amd/common/block/lpc/Kconfig @@ -16,12 +16,20 @@ config SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA help Select this option to enable SPI DMA support. -# The LPC SPI DMA controller requires the destination buffers to be 64 byte +# The LPC SPI DMA controller requires the source and destination to be 64 byte # aligned. config CBFS_CACHE_ALIGN int default 64 if SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA +config FSP_ALIGNMENT_FSP_S + int + default 64 if SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA + +config FSP_ALIGNMENT_FSP_M + int + default 64 if SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA + config SOC_AMD_COMMON_BLOCK_HAS_ESPI bool help |