diff options
| author | Hannah Williams <hannah.williams@intel.com> | 2016-01-26 15:40:24 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-01-28 20:44:50 +0100 |
| commit | ba6dfe4cc57578cbce1e710c8477d6dda997541a (patch) | |
| tree | 90c557b8cd0fd46588792c25acee1cb29b8d6d95 /src/soc | |
| parent | 73600e31992bf115b47de37dcd597b8560b05751 (diff) | |
soc/braswell/acpi: Fix CID1 offset in comment
Signed-off-by: Hannah Williams <hannah.williams@intel.com>
Change-Id: I9fd2ebba985362fe8068c10390bb014cf9015ac5
Reviewed-on: https://review.coreboot.org/13483
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/braswell/acpi/globalnvs.asl | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/braswell/acpi/globalnvs.asl b/src/soc/intel/braswell/acpi/globalnvs.asl index e7fb2ce255..5c8a75fcb9 100644 --- a/src/soc/intel/braswell/acpi/globalnvs.asl +++ b/src/soc/intel/braswell/acpi/globalnvs.asl @@ -51,7 +51,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) PM1I, 32, /* 0x15 - System Wake Source - PM1 Index */ GPEI, 32, /* 0x19 - GPE Wake Source */ BDID, 8, /* 0x1d - Board ID */ - CID1, 16, /* 0x1A - Wifi Domain Type */ + CID1, 16, /* 0x1e - Wifi Domain Type */ /* Device Config */ Offset (0x20), |