diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2019-01-23 12:04:43 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-01-27 11:14:26 +0000 |
| commit | b58e99dfa56e1cf02e5bc0720872836bf8bded93 (patch) | |
| tree | 8e2825eb2b33ca9a32b53613254ca85a0af51c8e /src/soc | |
| parent | d3fa7fa5d810688cdcdb7c34b7f13ae1350a0f84 (diff) | |
src: Fix the warning "type 'hex' are always defined"
This is spotted using "./util/lint/kconfig_lint"
While at it, do the check in C and not the preprocessor.
Change-Id: Icfda267936a23d9d14832116d67571f42f685906
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/31050
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/common/block/pcr/pcr.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip.c | 12 | ||||
| -rw-r--r-- | src/soc/intel/skylake/chip_fsp20.c | 18 |
3 files changed, 17 insertions, 15 deletions
diff --git a/src/soc/intel/common/block/pcr/pcr.c b/src/soc/intel/common/block/pcr/pcr.c index 804ccff39b..e354c032fc 100644 --- a/src/soc/intel/common/block/pcr/pcr.c +++ b/src/soc/intel/common/block/pcr/pcr.c @@ -21,7 +21,7 @@ #include <soc/pci_devs.h> #include <timer.h> -#if !defined(CONFIG_PCR_BASE_ADDRESS) || (CONFIG_PCR_BASE_ADDRESS == 0) +#if (CONFIG_PCR_BASE_ADDRESS == 0) #error "PCR_BASE_ADDRESS need to be non-zero!" #endif diff --git a/src/soc/intel/skylake/chip.c b/src/soc/intel/skylake/chip.c index 07ac4e8fa3..cbbfaaaf06 100644 --- a/src/soc/intel/skylake/chip.c +++ b/src/soc/intel/skylake/chip.c @@ -170,12 +170,12 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params) params->LockDownConfigSpiEiss = 0; } /* only replacing preexisting subsys ID defaults when non-zero */ -#if defined(CONFIG_SUBSYSTEM_VENDOR_ID) && CONFIG_SUBSYSTEM_VENDOR_ID - params->PchConfigSubSystemVendorId = CONFIG_SUBSYSTEM_VENDOR_ID; -#endif -#if defined(CONFIG_SUBSYSTEM_DEVICE_ID) && CONFIG_SUBSYSTEM_DEVICE_ID - params->PchConfigSubSystemId = CONFIG_SUBSYSTEM_DEVICE_ID; -#endif + if (CONFIG_SUBSYSTEM_VENDOR_ID != 0) + params->PchConfigSubSystemVendorId = CONFIG_SUBSYSTEM_VENDOR_ID; + + if (CONFIG_SUBSYSTEM_DEVICE_ID != 0) + params->PchConfigSubSystemId = CONFIG_SUBSYSTEM_DEVICE_ID; + params->WakeConfigWolEnableOverride = config->WakeConfigWolEnableOverride; params->WakeConfigPcieWakeFromDeepSx = diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index 18c2aef676..3ade8d72cf 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -391,14 +391,16 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->SpiFlashCfgLockDown = 0; } /* only replacing preexisting subsys ID defaults when non-zero */ -#if defined(CONFIG_SUBSYSTEM_VENDOR_ID) && CONFIG_SUBSYSTEM_VENDOR_ID - params->DefaultSvid = CONFIG_SUBSYSTEM_VENDOR_ID; - params->PchSubSystemVendorId = CONFIG_SUBSYSTEM_VENDOR_ID; -#endif -#if defined(CONFIG_SUBSYSTEM_DEVICE_ID) && CONFIG_SUBSYSTEM_DEVICE_ID - params->DefaultSid = CONFIG_SUBSYSTEM_DEVICE_ID; - params->PchSubSystemId = CONFIG_SUBSYSTEM_DEVICE_ID; -#endif + if (CONFIG_SUBSYSTEM_VENDOR_ID != 0) { + params->DefaultSvid = CONFIG_SUBSYSTEM_VENDOR_ID; + params->PchSubSystemVendorId = CONFIG_SUBSYSTEM_VENDOR_ID; + } + + if (CONFIG_SUBSYSTEM_DEVICE_ID != 0) { + params->DefaultSid = CONFIG_SUBSYSTEM_DEVICE_ID; + params->PchSubSystemId = CONFIG_SUBSYSTEM_DEVICE_ID; + } + params->PchPmWolEnableOverride = config->WakeConfigWolEnableOverride; params->PchPmPcieWakeFromDeepSx = config->WakeConfigPcieWakeFromDeepSx; params->PchPmDeepSxPol = config->PmConfigDeepSxPol; |