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authorElyes Haouas <ehaouas@noos.fr>2024-08-31 10:57:18 +0200
committerElyes Haouas <ehaouas@noos.fr>2024-09-01 04:58:51 +0000
commitb1ae6ca7ef8b848e53577cb9da46c19d2d5886a8 (patch)
tree8900b50b15d8934d7a1d8efc711ca8e7498ffe0d /src/soc
parentf3d54feef4c700991dd11b012f810162c5b6b06a (diff)
tree: Use boolean for s0ix_enable
Change-Id: Id0ab5e641684e03da555a127808c0def5a53cbe6 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/84159 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/elkhartlake/chip.h2
-rw-r--r--src/soc/intel/tigerlake/chip.h2
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/elkhartlake/chip.h b/src/soc/intel/elkhartlake/chip.h
index e5c7f54046..d446ef0ffa 100644
--- a/src/soc/intel/elkhartlake/chip.h
+++ b/src/soc/intel/elkhartlake/chip.h
@@ -128,7 +128,7 @@ struct soc_intel_elkhartlake_config {
uint32_t gen4_dec;
/* Enable S0iX support */
- int s0ix_enable;
+ bool s0ix_enable;
/* Enable DPTF support */
int dptf_enable;
diff --git a/src/soc/intel/tigerlake/chip.h b/src/soc/intel/tigerlake/chip.h
index e8d417e3a8..6785ebaaeb 100644
--- a/src/soc/intel/tigerlake/chip.h
+++ b/src/soc/intel/tigerlake/chip.h
@@ -141,7 +141,7 @@ struct soc_intel_tigerlake_config {
uint32_t gen4_dec;
/* Enable S0iX support */
- int s0ix_enable;
+ bool s0ix_enable;
/* S0iX: Selectively disable individual sub-states, by default all are enabled. */
enum lpm_state_mask LpmStateDisableMask;