diff options
author | Karthikeyan Ramasubramanian <kramasub@google.com> | 2023-05-09 11:23:02 -0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-05-22 12:49:27 +0000 |
commit | aa86e5f00673e205a6855a231ba2d2fa6e7d792e (patch) | |
tree | b25a7fc63be7aab4d28f97343676e264a0659f5d /src/soc | |
parent | 6f1b03b8f609ca4b464503f24cf2c8d606be6adc (diff) |
soc/amd/mendocino: Unmap hash table after usage
Earlier the entire SPI ROM is mapped at the start of verstage and then
unmapped at the end of verstage. With CB:74606, this behavior has
changed. So unmap the hash table CBFS file after usage.
BUG=b:240664755
TEST=Build and boot to OS in Skyrim. Perform cold, warm reboots and
suspend/resume cycles for 50 iterations each. Ensured that there is no
impact to boot time.
Change-Id: I5c605f8ba8bbd571b589b3cdf91e9cc71d711c1c
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75092
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/amd/mendocino/psp_verstage/chipset.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/mendocino/psp_verstage/chipset.c b/src/soc/amd/mendocino/psp_verstage/chipset.c index cb2c27ec4e..0b622e73de 100644 --- a/src/soc/amd/mendocino/psp_verstage/chipset.c +++ b/src/soc/amd/mendocino/psp_verstage/chipset.c @@ -44,6 +44,7 @@ void update_psp_fw_hash_table(const char *fname) printk(BIOS_ERR, "Too many entries in AMD Firmware hash table" " (SHA256:%d, SHA384:%d)\n", hash_table.no_of_entries_256, hash_table.no_of_entries_384); + cbfs_unmap(spi_ptr); return; } @@ -52,6 +53,7 @@ void update_psp_fw_hash_table(const char *fname) printk(BIOS_ERR, "No entries in AMD Firmware hash table" " (SHA256:%d, SHA384:%d)\n", hash_table.no_of_entries_256, hash_table.no_of_entries_384); + cbfs_unmap(spi_ptr); return; } @@ -67,6 +69,7 @@ void update_psp_fw_hash_table(const char *fname) memcpy(hash_384, spi_ptr, len); svc_set_fw_hash_table(&hash_table); + cbfs_unmap(spi_ptr); } uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) |