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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-11-29 21:17:19 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-08 13:43:53 +0000 |
| commit | 9bfbcd2127bd7416c5ff90509aeeac91f20e27f9 (patch) | |
| tree | d7767005579ed82c24f52601948bf751ad3c4a40 /src/soc | |
| parent | 858481e8149426b75807c7266f9e85295b57e5da (diff) | |
soc/amd/common/block/include/spi: update fch_spi_early_init description
commit 90ac882a32075b44435aa19ea664b89b79cac76e (soc/amd/common/block/
spi: introduce SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST) introduced a Kconfig
option to enable/disable the 4DW burst support in the SPI flash data
prefetcher, but missed to update the documentation above the
fch_spi_early_init prototype, so update the outdated documentation now.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I07c4b0b02251da63d34a172e2636894e99845d6b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/59931
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/spi.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/spi.h b/src/soc/amd/common/block/include/amdblocks/spi.h index 81da5dd53f..5c3bd0eac7 100644 --- a/src/soc/amd/common/block/include/amdblocks/spi.h +++ b/src/soc/amd/common/block/include/amdblocks/spi.h @@ -94,7 +94,7 @@ struct spi_config { * Perform early SPI initialization: * 1. Sets SPI ROM base and enables SPI ROM * 2. Enables SPI ROM prefetching - * 3. Disables 4dw burst + * 3. Disables 4 DWORD burst if !SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST * 4. Configures SPI speed and read mode. * * This function expects SoC to include soc_amd_common_config in chip SoC config and uses |