diff options
| author | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-06-16 09:26:18 +0800 |
|---|---|---|
| committer | Eric Lai <eric_lai@quanta.corp-partner.google.com> | 2023-06-17 02:37:47 +0000 |
| commit | 884a70b379258f1b9186299b0fff5afe63ce32db (patch) | |
| tree | e4f3cc245b8993476d05ecebb42e89734bf2e907 /src/soc | |
| parent | 8e38a67baca1a917cdc2c1383ad0b6c44563baca (diff) | |
soc/intel/meteorlake: Update tcss_usb3 alias
TCSS and TBT use the same lane on schematic. Update the port start
from 0 to match the Intel schematic. You can better follow the it
without convert the port number.
Signed-off-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Change-Id: Ic6631dcbbd9f6c79c756b015425e2da778eb395e
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75892
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/meteorlake/chipset.cb | 8 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/fsp_params.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/retimer.c | 2 |
3 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/intel/meteorlake/chipset.cb b/src/soc/intel/meteorlake/chipset.cb index 57d1205887..6a9c26a10a 100644 --- a/src/soc/intel/meteorlake/chipset.cb +++ b/src/soc/intel/meteorlake/chipset.cb @@ -57,16 +57,16 @@ chip soc/intel/meteorlake register "type" = "UPC_TYPE_HUB" device usb 0.0 alias tcss_root_hub off chip drivers/usb/acpi - device usb 3.0 alias tcss_usb3_port1 off end + device usb 3.0 alias tcss_usb3_port0 off end end chip drivers/usb/acpi - device usb 3.1 alias tcss_usb3_port2 off end + device usb 3.1 alias tcss_usb3_port1 off end end chip drivers/usb/acpi - device usb 3.2 alias tcss_usb3_port3 off end + device usb 3.2 alias tcss_usb3_port2 off end end chip drivers/usb/acpi - device usb 3.3 alias tcss_usb3_port4 off end + device usb 3.3 alias tcss_usb3_port3 off end end end end diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 790bf9ca11..30800e67a6 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -413,10 +413,10 @@ static void fill_fsps_tcss_params(FSP_S_CONFIG *s_cfg, const struct soc_intel_meteorlake_config *config) { const struct device *tcss_port_arr[] = { + DEV_PTR(tcss_usb3_port0), DEV_PTR(tcss_usb3_port1), DEV_PTR(tcss_usb3_port2), DEV_PTR(tcss_usb3_port3), - DEV_PTR(tcss_usb3_port4), }; s_cfg->TcssAuxOri = config->tcss_aux_ori; diff --git a/src/soc/intel/meteorlake/retimer.c b/src/soc/intel/meteorlake/retimer.c index 3fd9c2d43d..269620d0d1 100644 --- a/src/soc/intel/meteorlake/retimer.c +++ b/src/soc/intel/meteorlake/retimer.c @@ -10,10 +10,10 @@ int retimer_get_index_for_typec(uint8_t typec_port) int ec_port = 0; const struct device *tcss_port_arr[] = { + DEV_PTR(tcss_usb3_port0), DEV_PTR(tcss_usb3_port1), DEV_PTR(tcss_usb3_port2), DEV_PTR(tcss_usb3_port3), - DEV_PTR(tcss_usb3_port4), }; for (uint8_t i = 0; i < MAX_TYPE_C_PORTS; i++) { |