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authorSubrata Banik <subratabanik@google.com>2024-07-16 13:04:44 +0000
committerSubrata Banik <subratabanik@google.com>2024-07-18 06:00:57 +0000
commit84c0d95f3f9eb9e9dde319abc2e04b3e344de0ca (patch)
tree09b2ad18db79a11240de340b23fa26bae0617b15 /src/soc
parent4c5c68588251d6cee630ae809ef737498f2bd05f (diff)
soc/intel/alderlake: Use common CAR API for cache reporting
Replace the SoC-specific `report_cache_info()` function with the common `car_report_cache_info()` API from `car_lib`. This promotes code reuse and reduces SoC-specific implementation for cache reporting. BUG=none TEST=Builds and boots successfully on google/marasov platform. Change-Id: I18be2c33dbe5186643af52823eb2fb185a296909 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/83481 Reviewed-by: Eric Lai <ericllai@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/alderlake/bootblock/report_platform.c18
1 files changed, 2 insertions, 16 deletions
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index cd4ac00c14..6372cd6751 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -16,6 +16,7 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
+#include <intelblocks/car_lib.h>
#include <soc/bootblock.h>
#include <soc/pci_devs.h>
@@ -251,21 +252,6 @@ static inline uint16_t get_dev_id(pci_devfn_t dev)
return pci_read_config16(dev, PCI_DEVICE_ID);
}
-static void report_cache_info(void)
-{
- int cache_level = CACHE_L3;
- struct cpu_cache_info info;
-
- if (!fill_cpu_cache_info(cache_level, &info))
- return;
-
- printk(BIOS_INFO, "Cache: Level %d: ", cache_level);
- printk(BIOS_INFO, "Associativity = %zd Partitions = %zd Line Size = %zd Sets = %zd\n",
- info.num_ways, info.physical_partitions, info.line_size, info.num_sets);
-
- printk(BIOS_INFO, "Cache size = %zu MiB\n", get_cache_size(&info)/MiB);
-}
-
static void report_cpu_info(void)
{
u32 i, cpu_id, cpu_feature_flag;
@@ -297,7 +283,7 @@ static void report_cpu_info(void)
"CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n",
mode[aes], mode[txt], mode[vt]);
- report_cache_info();
+ car_report_cache_info();
}
static void report_mch_info(void)