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authorJulius Werner <jwerner@chromium.org>2020-03-04 16:52:08 -0800
committerPatrick Georgi <pgeorgi@google.com>2020-12-02 22:13:17 +0000
commit834b3ecd7cbefbad8f09a9bda4f10cd7842cdbcd (patch)
tree13db079f261e5fd3854f85e7f03c2d177fa7dbbb /src/soc
parent0d9072b1a196627755164288a9f334ef844628f5 (diff)
cbfs: Simplify load/map API names, remove type arguments
This patch renames cbfs_boot_map_with_leak() and cbfs_boot_load_file() to cbfs_map() and cbfs_load() respectively. This is supposed to be the start of a new, better organized CBFS API where the most common operations have the most simple and straight-forward names. Less commonly used variants of these operations (e.g. cbfs_ro_load() or cbfs_region_load()) can be introduced later. It seems unnecessary to keep carrying around "boot" in the names of most CBFS APIs if the vast majority of accesses go to the boot CBFS (instead, more unusual operations should have longer names that describe how they diverge from the common ones). cbfs_map() is paired with a new cbfs_unmap() to allow callers to cleanly reap mappings when desired. A few new cbfs_unmap() calls are added to generic code where it makes sense, but it seems unnecessary to introduce this everywhere in platform or architecture specific code where the boot medium is known to be memory-mapped anyway. In fact, even for non-memory-mapped platforms, sometimes leaking a mapping to the CBFS cache is a much cleaner solution than jumping through hoops to provide some other storage for some long-lived file object, and it shouldn't be outright forbidden when it makes sense. Additionally, remove the type arguments from these function signatures. The goal is to eventually remove type arguments for lookup from the whole CBFS API. Filenames already uniquely identify CBFS files. The type field is just informational, and there should be APIs to allow callers to check it when desired, but it's not clear what we gain from forcing this as a parameter into every single CBFS access when the vast majority of the time it provides no additional value and is just clutter. Signed-off-by: Julius Werner <jwerner@chromium.org> Change-Id: Ib24325400815a9c3d25f66c61829a24a239bb88e Reviewed-on: https://review.coreboot.org/c/coreboot/+/39304 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Reviewed-by: Wim Vervoorn <wvervoorn@eltan.com> Reviewed-by: Mariusz SzafraƄski <mariuszx.szafranski@intel.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/block/pi/def_callouts.c5
-rw-r--r--src/soc/amd/picasso/update_microcode.c3
-rw-r--r--src/soc/cavium/cn81xx/soc.c3
-rw-r--r--src/soc/intel/baytrail/romstage/raminit.c2
-rw-r--r--src/soc/intel/common/mma.c6
-rw-r--r--src/soc/intel/denverton_ns/chip.c3
-rw-r--r--src/soc/intel/xeon_sp/skx/chip.c3
-rw-r--r--src/soc/mediatek/mt8183/spm.c3
-rw-r--r--src/soc/mediatek/mt8183/sspm.c5
-rw-r--r--src/soc/qualcomm/ipq40xx/blobs_init.c3
-rw-r--r--src/soc/qualcomm/ipq806x/blobs_init.c3
-rw-r--r--src/soc/qualcomm/sc7180/qclib.c8
-rw-r--r--src/soc/qualcomm/sc7180/qupv3_config.c5
13 files changed, 20 insertions, 32 deletions
diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c
index 56ce995f1c..2ee7f46056 100644
--- a/src/soc/amd/common/block/pi/def_callouts.c
+++ b/src/soc/amd/common/block/pi/def_callouts.c
@@ -136,9 +136,8 @@ AGESA_STATUS agesa_GfxGetVbiosImage(uint32_t Func, uintptr_t FchData,
GFX_VBIOS_IMAGE_INFO *pVbiosImageInfo;
pVbiosImageInfo = (GFX_VBIOS_IMAGE_INFO *)ConfigPrt;
- pVbiosImageInfo->ImagePtr = cbfs_boot_map_with_leak(
- "pci"CONFIG_VGA_BIOS_ID".rom",
- CBFS_TYPE_OPTIONROM, NULL);
+ pVbiosImageInfo->ImagePtr = cbfs_map(
+ "pci"CONFIG_VGA_BIOS_ID".rom", NULL);
printk(BIOS_DEBUG, "%s: IMGptr=%p\n", __func__,
pVbiosImageInfo->ImagePtr);
return pVbiosImageInfo->ImagePtr ? AGESA_SUCCESS : AGESA_WARNING;
diff --git a/src/soc/amd/picasso/update_microcode.c b/src/soc/amd/picasso/update_microcode.c
index 8f3d3e22b8..47a98353b9 100644
--- a/src/soc/amd/picasso/update_microcode.c
+++ b/src/soc/amd/picasso/update_microcode.c
@@ -80,8 +80,7 @@ void amd_update_microcode_from_cbfs(void)
size_t ucode_len;
uint16_t equivalent_processor_rev_id = get_equivalent_processor_rev_id();
- ucode = cbfs_boot_map_with_leak("cpu_microcode_blob.bin",
- CBFS_TYPE_MICROCODE, &ucode_len);
+ ucode = cbfs_map("cpu_microcode_blob.bin", &ucode_len);
if (!ucode) {
printk(BIOS_WARNING, "cpu_microcode_blob.bin not found. Skipping updates.\n");
return;
diff --git a/src/soc/cavium/cn81xx/soc.c b/src/soc/cavium/cn81xx/soc.c
index 3545d55bd9..368e9250e2 100644
--- a/src/soc/cavium/cn81xx/soc.c
+++ b/src/soc/cavium/cn81xx/soc.c
@@ -334,8 +334,7 @@ static void soc_init_atf(void)
size_t size = 0;
- void *ptr = cbfs_boot_map_with_leak("sff8104-linux.dtb",
- CBFS_TYPE_RAW, &size);
+ void *ptr = cbfs_map("sff8104-linux.dtb", &size);
if (ptr)
memcpy(_sff8104, ptr, size);
/* Point to devicetree in secure memory */
diff --git a/src/soc/intel/baytrail/romstage/raminit.c b/src/soc/intel/baytrail/romstage/raminit.c
index 9a67c22e4b..10ad93298b 100644
--- a/src/soc/intel/baytrail/romstage/raminit.c
+++ b/src/soc/intel/baytrail/romstage/raminit.c
@@ -153,7 +153,7 @@ void raminit(struct mrc_params *mp, int prev_sleep_state)
}
/* Determine if mrc.bin is in the cbfs. */
- if (cbfs_boot_map_with_leak("mrc.bin", CBFS_TYPE_MRC, NULL) == NULL) {
+ if (cbfs_map("mrc.bin", NULL) == NULL) {
printk(BIOS_DEBUG, "Couldn't find mrc.bin\n");
return;
}
diff --git a/src/soc/intel/common/mma.c b/src/soc/intel/common/mma.c
index a2ccaf5c16..e015567a69 100644
--- a/src/soc/intel/common/mma.c
+++ b/src/soc/intel/common/mma.c
@@ -113,7 +113,7 @@ int mma_locate_param(struct mma_config_param *mma_cfg)
printk(BIOS_DEBUG, "MMA: Entry %s\n", __func__);
if (cbfs_locate_file_in_region(&metadata_fh, MMA_CBFS_REGION,
- MMA_TEST_METADATA_FILENAME, &mma_type)) {
+ MMA_TEST_METADATA_FILENAME)) {
printk(BIOS_DEBUG, "MMA: Failed to locate %s\n",
MMA_TEST_METADATA_FILENAME);
return -1;
@@ -154,7 +154,7 @@ int mma_locate_param(struct mma_config_param *mma_cfg)
test_filename, test_param_filename);
if (cbfs_locate_file_in_region(&test_content_fh, MMA_CBFS_REGION,
- test_filename, &efi_type)) {
+ test_filename)) {
printk(BIOS_DEBUG, "MMA: Failed to locate %s\n",
test_filename);
return -1;
@@ -163,7 +163,7 @@ int mma_locate_param(struct mma_config_param *mma_cfg)
cbfs_file_data(&mma_cfg->test_content, &test_content_fh);
if (cbfs_locate_file_in_region(&test_param_fh, MMA_CBFS_REGION,
- test_param_filename, &mma_type)) {
+ test_param_filename)) {
printk(BIOS_DEBUG, "MMA: Failed to locate %s\n",
test_param_filename);
return -1;
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index 3bade119e6..9cf3bfb54a 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -84,8 +84,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
const struct microcode *microcode_file;
size_t microcode_len;
- microcode_file = cbfs_boot_map_with_leak("cpu_microcode_blob.bin",
- CBFS_TYPE_MICROCODE, &microcode_len);
+ microcode_file = cbfs_map("cpu_microcode_blob.bin", &microcode_len);
if ((microcode_file != NULL) && (microcode_len != 0)) {
/* Update CPU Microcode patch base address/size */
diff --git a/src/soc/intel/xeon_sp/skx/chip.c b/src/soc/intel/xeon_sp/skx/chip.c
index 7fe330b37e..0505ea7eff 100644
--- a/src/soc/intel/xeon_sp/skx/chip.c
+++ b/src/soc/intel/xeon_sp/skx/chip.c
@@ -59,8 +59,7 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *silupd)
const struct microcode *microcode_file;
size_t microcode_len;
- microcode_file = cbfs_boot_map_with_leak("cpu_microcode_blob.bin",
- CBFS_TYPE_MICROCODE, &microcode_len);
+ microcode_file = cbfs_map("cpu_microcode_blob.bin", &microcode_len);
if ((microcode_file != NULL) && (microcode_len != 0)) {
/* Update CPU Microcode patch base address/size */
diff --git a/src/soc/mediatek/mt8183/spm.c b/src/soc/mediatek/mt8183/spm.c
index 01c6a2fbfa..e35fc57e2f 100644
--- a/src/soc/mediatek/mt8183/spm.c
+++ b/src/soc/mediatek/mt8183/spm.c
@@ -231,8 +231,7 @@ static int spm_load_firmware(enum dyna_load_pcm_index index,
stopwatch_init(&sw);
- size_t file_size = cbfs_boot_load_file(file_name, spm_bin,
- sizeof(spm_bin), CBFS_TYPE_RAW);
+ size_t file_size = cbfs_load(file_name, spm_bin, sizeof(spm_bin));
if (file_size == 0) {
printk(BIOS_ERR, "SPM binary %s not found\n", file_name);
diff --git a/src/soc/mediatek/mt8183/sspm.c b/src/soc/mediatek/mt8183/sspm.c
index efcf54574e..1a4ba9e88f 100644
--- a/src/soc/mediatek/mt8183/sspm.c
+++ b/src/soc/mediatek/mt8183/sspm.c
@@ -13,10 +13,7 @@ static uint8_t sspm_bin[BUF_SIZE] __aligned(8);
void sspm_init(void)
{
const char *file_name = "sspm.bin";
- size_t fw_size = cbfs_boot_load_file(file_name,
- sspm_bin,
- sizeof(sspm_bin),
- CBFS_TYPE_RAW);
+ size_t fw_size = cbfs_load(file_name, sspm_bin, sizeof(sspm_bin));
if (fw_size == 0)
die("SSPM file :sspm.bin not found.");
diff --git a/src/soc/qualcomm/ipq40xx/blobs_init.c b/src/soc/qualcomm/ipq40xx/blobs_init.c
index 8cd9fc7f55..60e4f0de04 100644
--- a/src/soc/qualcomm/ipq40xx/blobs_init.c
+++ b/src/soc/qualcomm/ipq40xx/blobs_init.c
@@ -22,8 +22,7 @@ static void *load_ipq_blob(const char *file_name)
void *blob_dest;
size_t blob_size;
- blob_mbn = cbfs_boot_map_with_leak(file_name, CBFS_TYPE_RAW,
- &blob_size);
+ blob_mbn = cbfs_map(file_name, &blob_size);
if (!blob_mbn)
return NULL;
diff --git a/src/soc/qualcomm/ipq806x/blobs_init.c b/src/soc/qualcomm/ipq806x/blobs_init.c
index 89c26b5834..15068a59de 100644
--- a/src/soc/qualcomm/ipq806x/blobs_init.c
+++ b/src/soc/qualcomm/ipq806x/blobs_init.c
@@ -18,8 +18,7 @@ static void *load_ipq_blob(const char *file_name)
void *blob_dest;
size_t blob_size;
- blob_mbn = cbfs_boot_map_with_leak(file_name, CBFS_TYPE_RAW,
- &blob_size);
+ blob_mbn = cbfs_map(file_name, &blob_size);
if (!blob_mbn)
return NULL;
diff --git a/src/soc/qualcomm/sc7180/qclib.c b/src/soc/qualcomm/sc7180/qclib.c
index 274d906240..2bff80d040 100644
--- a/src/soc/qualcomm/sc7180/qclib.c
+++ b/src/soc/qualcomm/sc7180/qclib.c
@@ -11,15 +11,15 @@ int qclib_soc_blob_load(void)
size_t size;
/* Attempt to load PMICCFG Blob */
- size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX "/pmiccfg",
- _pmic, REGION_SIZE(pmic), CBFS_TYPE_RAW);
+ size = cbfs_load(CONFIG_CBFS_PREFIX "/pmiccfg",
+ _pmic, REGION_SIZE(pmic));
if (!size)
return -1;
qclib_add_if_table_entry(QCLIB_TE_PMIC_SETTINGS, _pmic, size, 0);
/* Attempt to load DCB Blob */
- size = cbfs_boot_load_file(CONFIG_CBFS_PREFIX "/dcb",
- _dcb, REGION_SIZE(dcb), CBFS_TYPE_RAW);
+ size = cbfs_load(CONFIG_CBFS_PREFIX "/dcb",
+ _dcb, REGION_SIZE(dcb));
if (!size)
return -1;
qclib_add_if_table_entry(QCLIB_TE_DCB_SETTINGS, _dcb, size, 0);
diff --git a/src/soc/qualcomm/sc7180/qupv3_config.c b/src/soc/qualcomm/sc7180/qupv3_config.c
index 8cd9670f87..4bc99367a0 100644
--- a/src/soc/qualcomm/sc7180/qupv3_config.c
+++ b/src/soc/qualcomm/sc7180/qupv3_config.c
@@ -27,10 +27,9 @@ void qupv3_se_fw_load_and_init(unsigned int bus, unsigned int protocol,
die("*ERROR* * INVALID PROTOCOL ***\n");
if (!fw_list[protocol]) {
- fw_list[protocol] = cbfs_boot_map_with_leak(filename[protocol],
- CBFS_TYPE_RAW, NULL);
+ fw_list[protocol] = cbfs_map(filename[protocol], NULL);
if (!fw_list[protocol])
- die("*ERROR* * cbfs_boot_map_with_leak failed ***\n");
+ die("*ERROR* * cbfs_map() failed ***\n");
}
hdr = fw_list[protocol];