diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-31 18:53:47 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2022-07-13 14:56:38 +0000 |
commit | 7ae8fa538e2aaabb5414e5e90584f9bcb7e6f1e4 (patch) | |
tree | 0368badff02dd61d7eecdc98591681e6e7990fac /src/soc | |
parent | b00ba8c2473af6eae246de699886597e898c714b (diff) |
cpu/amd: Add common helpers for TSEG and SMM
Change-Id: I73174766980e0405e7b8efd4f059bb400c0c0a25
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64866
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/amd/common/block/cpu/smm/finalize.c | 24 | ||||
-rw-r--r-- | src/soc/amd/common/block/cpu/smm/smm_helper.c | 28 | ||||
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/smm.h | 3 |
3 files changed, 38 insertions, 17 deletions
diff --git a/src/soc/amd/common/block/cpu/smm/finalize.c b/src/soc/amd/common/block/cpu/smm/finalize.c index 73b21216f5..d0fe4bc9d6 100644 --- a/src/soc/amd/common/block/cpu/smm/finalize.c +++ b/src/soc/amd/common/block/cpu/smm/finalize.c @@ -1,31 +1,25 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <acpi/acpi.h> -#include <cpu/x86/mp.h> -#include <cpu/x86/msr.h> -#include <cpu/amd/msr.h> +#include <amdblocks/acpi.h> +#include <amdblocks/smm.h> #include <bootstate.h> #include <console/console.h> -#include <amdblocks/acpi.h> +#include <cpu/amd/msr.h> +#include <cpu/x86/mp.h> +#include <cpu/x86/msr.h> #include <types.h> static void per_core_finalize(void *unused) { - msr_t hwcr, mask; - /* Finalize SMM settings */ - hwcr = rdmsr(HWCR_MSR); - if (hwcr.lo & SMM_LOCK) /* Skip if already locked, avoid GPF */ + if (is_smm_locked()) /* Skip if already locked, avoid GPF */ return; - if (CONFIG(HAVE_SMI_HANDLER)) { - mask = rdmsr(SMM_MASK_MSR); - mask.lo |= SMM_TSEG_VALID; - wrmsr(SMM_MASK_MSR, mask); - } + if (CONFIG(HAVE_SMI_HANDLER)) + tseg_valid(); - hwcr.lo |= SMM_LOCK; - wrmsr(HWCR_MSR, hwcr); + lock_smm(); } static void finalize_cores(void) diff --git a/src/soc/amd/common/block/cpu/smm/smm_helper.c b/src/soc/amd/common/block/cpu/smm/smm_helper.c index ce80f1613c..e87d12c641 100644 --- a/src/soc/amd/common/block/cpu/smm/smm_helper.c +++ b/src/soc/amd/common/block/cpu/smm/smm_helper.c @@ -1,9 +1,12 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#include <amdblocks/smm.h> #include <console/console.h> -#include <cpu/x86/msr.h> +#include <cpu/amd/amd64_save_state.h> #include <cpu/amd/msr.h> +#include <amdblocks/smm.h> +#include <cpu/cpu.h> +#include <cpu/x86/msr.h> +#include <stdint.h> /* * For data stored in TSEG, ensure TValid is clear so R/W access can reach @@ -26,3 +29,24 @@ void clear_tvalid(void) mask.lo &= ~SMM_TSEG_VALID; wrmsr(SMM_MASK_MSR, mask); } + +void tseg_valid(void) +{ + msr_t mask = rdmsr(SMM_MASK_MSR); + mask.lo |= SMM_TSEG_VALID; + + wrmsr(SMM_MASK_MSR, mask); +} + +bool is_smm_locked(void) +{ + msr_t hwcr = rdmsr(HWCR_MSR); + return hwcr.lo & SMM_LOCK ? true : false; +} + +void lock_smm(void) +{ + msr_t hwcr = rdmsr(HWCR_MSR); + hwcr.lo |= SMM_LOCK; + wrmsr(HWCR_MSR, hwcr); +} diff --git a/src/soc/amd/common/block/include/amdblocks/smm.h b/src/soc/amd/common/block/include/amdblocks/smm.h index 91246073d5..7fa8648ba6 100644 --- a/src/soc/amd/common/block/include/amdblocks/smm.h +++ b/src/soc/amd/common/block/include/amdblocks/smm.h @@ -12,6 +12,9 @@ void *get_smi_source_handler(int source); void handle_smi_gsmi(void); void handle_smi_store(void); void clear_tvalid(void); +void tseg_valid(void); +bool is_smm_locked(void); +void lock_smm(void); /* See SMITYPE_* for list possible of events. GEVENTS are handled with mainboard_smi_gpi. */ void mainboard_handle_smi(int event); |