diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2021-05-29 06:58:38 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-07-14 02:19:28 +0000 |
commit | 78ab06ace918f6efa1a36c896b85806c5f617393 (patch) | |
tree | c4a62378f5bf7f44329d723813d719b13750d7ad /src/soc | |
parent | 53ea1d44f0435ca419de04e275e08b1bd296922c (diff) |
src: Use initial_lapicid() instead of open coding it
Since initial_lapicid() returns an unsigned int, change the type of the
local variables the return value gets assigned to to unsigned int as
well if applicable. Also change the printk format strings for printing
the variable's contents to %u where it was %d before.
Change-Id: I289015b81b2a9d915c4cab9b0544fc19b85df7a3
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55063
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r-- | src/soc/amd/picasso/mca.c | 7 | ||||
-rw-r--r-- | src/soc/amd/stoneyridge/mca.c | 7 | ||||
-rw-r--r-- | src/soc/intel/xeon_sp/smmrelocate.c | 5 |
3 files changed, 8 insertions, 11 deletions
diff --git a/src/soc/amd/picasso/mca.c b/src/soc/amd/picasso/mca.c index acb248d2f4..65b1916112 100644 --- a/src/soc/amd/picasso/mca.c +++ b/src/soc/amd/picasso/mca.c @@ -2,6 +2,7 @@ #include <amdblocks/msr_zen.h> #include <amdblocks/reset.h> +#include <cpu/x86/lapic.h> #include <cpu/x86/msr.h> #include <acpi/acpi.h> #include <soc/cpu.h> @@ -160,10 +161,8 @@ void check_mca(void) for (i = 0 ; i < num_banks ; i++) { mci.sts = rdmsr(MCAX_STATUS_MSR(i)); if (mci.sts.hi || mci.sts.lo) { - int core = cpuid_ebx(1) >> 24; - - printk(BIOS_WARNING, "#MC Error: core %d, bank %d %s\n", - core, i, + printk(BIOS_WARNING, "#MC Error: core %u, bank %d %s\n", + initial_lapicid(), i, i < ARRAY_SIZE(mca_bank_name) ? mca_bank_name[i] : ""); printk(BIOS_WARNING, " MC%d_STATUS = %08x_%08x\n", diff --git a/src/soc/amd/stoneyridge/mca.c b/src/soc/amd/stoneyridge/mca.c index db5fabc389..1523563d0c 100644 --- a/src/soc/amd/stoneyridge/mca.c +++ b/src/soc/amd/stoneyridge/mca.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <amdblocks/reset.h> +#include <cpu/x86/lapic.h> #include <cpu/x86/msr.h> #include <acpi/acpi.h> #include <soc/cpu.h> @@ -163,10 +164,8 @@ void check_mca(void) mci.sts = rdmsr(IA32_MC0_STATUS + (i * 4)); if (mci.sts.hi || mci.sts.lo) { - int core = cpuid_ebx(1) >> 24; - - printk(BIOS_WARNING, "#MC Error: core %d, bank %d %s\n", - core, i, mca_bank_name[i]); + printk(BIOS_WARNING, "#MC Error: core %u, bank %d %s\n", + initial_lapicid(), i, mca_bank_name[i]); printk(BIOS_WARNING, " MC%d_STATUS = %08x_%08x\n", i, mci.sts.hi, mci.sts.lo); diff --git a/src/soc/intel/xeon_sp/smmrelocate.c b/src/soc/intel/xeon_sp/smmrelocate.c index dc4b511ad2..f44fc62d3e 100644 --- a/src/soc/intel/xeon_sp/smmrelocate.c +++ b/src/soc/intel/xeon_sp/smmrelocate.c @@ -2,6 +2,7 @@ #include <assert.h> #include <string.h> +#include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <cpu/intel/em64t101_save_state.h> #include <cpu/intel/smm_reloc.h> @@ -86,7 +87,6 @@ static void update_save_state(int cpu, uintptr_t curr_smbase, { u32 smbase; u32 iedbase; - int apic_id; em64t101_smm_state_save_area_t *save_state; /* * The relocated handler runs with all CPUs concurrently. Therefore @@ -96,9 +96,8 @@ static void update_save_state(int cpu, uintptr_t curr_smbase, smbase = staggered_smbase; iedbase = relo_params->ied_base; - apic_id = cpuid_ebx(1) >> 24; printk(BIOS_DEBUG, "New SMBASE=0x%08x IEDBASE=0x%08x\n apic_id=0x%x\n", - smbase, iedbase, apic_id); + smbase, iedbase, initial_lapicid()); save_state = (void *)(curr_smbase + SMM_DEFAULT_SIZE - sizeof(*save_state)); |