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authorFelix Held <felix-coreboot@felixheld.de>2023-03-24 15:16:10 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-03-27 12:14:08 +0000
commit70ba567117fae7b8804670ea60371f20498227e5 (patch)
tree98fb083e9892bba9fb9e4268b8cb82c3e226e98a /src/soc
parent00d496f92fdf600c0fd674b9bc9d5b0b471b1b06 (diff)
soc/amd/common/block/cpu/Makefile: group build targets by stage
Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Idb6087dc44e76ab63bc6b462c3328c23d83ae018 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74009 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/common/block/cpu/Makefile.inc5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/amd/common/block/cpu/Makefile.inc b/src/soc/amd/common/block/cpu/Makefile.inc
index 055341ec4d..f198af2e30 100644
--- a/src/soc/amd/common/block/cpu/Makefile.inc
+++ b/src/soc/amd/common/block/cpu/Makefile.inc
@@ -1,11 +1,12 @@
## SPDX-License-Identifier: GPL-2.0-only
subdirs-y += ./*
-ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE) += update_microcode.c
+
romstage-y += cpu.c
-ramstage-y += cpu.c
+ramstage-y += cpu.c
ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_SVI2) += svi2.c
ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_SVI3) += svi3.c
+ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE) += update_microcode.c
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UCODE),y)
define add-ucode-as-cbfs