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authorFred Reitberger <reitbergerfred@gmail.com>2023-01-11 14:02:00 -0500
committerFelix Held <felix-coreboot@felixheld.de>2023-01-12 20:35:52 +0000
commit672788d26b250c6bc2add8f56187bd1ed658621e (patch)
tree846e0e4636fbce2f8e64d675c7d2c0a39f9f9c0e /src/soc
parentb931ca89a391d1241cb47fc1fe4ff4a37beec639 (diff)
soc/amd/mendocino/include/soc/southbridge.h: Use BIT macro for consistency
Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I2dd17774b79c5adb64c2575ac55dec476c434842 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71843 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/mendocino/include/soc/southbridge.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/mendocino/include/soc/southbridge.h b/src/soc/amd/mendocino/include/soc/southbridge.h
index af5b4c2df7..2e88c77329 100644
--- a/src/soc/amd/mendocino/include/soc/southbridge.h
+++ b/src/soc/amd/mendocino/include/soc/southbridge.h
@@ -11,7 +11,7 @@
#define PM_PCI_CTRL 0x08
#define FORCE_SLPSTATE_RETRY BIT(25)
#define PWR_RESET_CFG 0x10
-#define TOGGLE_ALL_PWR_GOOD (1 << 1)
+#define TOGGLE_ALL_PWR_GOOD BIT(1)
#define PM_SERIRQ_CONF 0x54
#define PM_SERIRQ_NUM_BITS_17 0x0000
#define PM_SERIRQ_NUM_BITS_18 0x0004