diff options
| author | Kane Chen <kane.chen@intel.com> | 2018-03-29 19:12:53 +0800 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2018-03-30 06:43:12 +0000 |
| commit | 5b84fad5a9ddbe45d07ea650c74c92e16654af65 (patch) | |
| tree | dcf5e2804b197c8d846e4556cdec9b473a320566 /src/soc | |
| parent | ba49c09b2f69f3daccc8a04edfd025f93a4f217c (diff) | |
soc/intel/skylake: Protect me_progress_rom_values array boundary
me_progress_rom_values array provides detailed information maps to ME
HFSTS2 register value.
There is a chance that ME status value might be over the size of
me_progress_rom_values.
This commit adds a check before access the array.
BUG=b:77247550
Change-Id: I5de569c62b94b0595d3d3ea254f50e312e8c11a4
Signed-off-by: Kane Chen <kane.chen@intel.com>
Reviewed-on: https://review.coreboot.org/25425
Reviewed-by: Kevin Chiu <Kevin.Chiu@quantatw.com>
Reviewed-by: Shelley Chen <shchen@google.com>
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/skylake/me.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c index 9a721bced1..a23172e60c 100644 --- a/src/soc/intel/skylake/me.c +++ b/src/soc/intel/skylake/me.c @@ -346,8 +346,14 @@ void intel_me_status(void) printk(BIOS_DEBUG, "ME: Progress Phase State : "); switch (hfs2.fields.progress_code) { case ME_HFS2_PHASE_ROM: /* ROM Phase */ - printk(BIOS_DEBUG, "%s", - me_progress_rom_values[hfs2.fields.current_state]); + if (hfs2.fields.current_state + < ARRAY_SIZE(me_progress_rom_values) + && me_progress_rom_values[hfs2.fields.current_state]) + printk(BIOS_DEBUG, "%s", + me_progress_rom_values[ + hfs2.fields.current_state]); + else + printk(BIOS_DEBUG, "0x%02x", hfs2.fields.current_state); break; case ME_HFS2_PHASE_UKERNEL: /* uKernel Phase */ |