soc/intel/uart: Drop SoC callback `soc_uart_console_to_device`

This change renames `struct uart_gpio_pad_config` to `struct
uart_controller_config` and adds a new parameter devfn (which expects
devfn for the UART controller corresponding to the index in
PCI_DEVFN() format). This gets rid of the SoC callback to get `struct
device` pointer to the UART controller device.

Change-Id: Id0712a0038f2cc1a61b8b5a58fa155f14e7949a5
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49212
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

10 files changed, 49 insertions, 194 deletions

diff --git a/src/soc/intel/alderlake/uart.c b/src/soc/intel/alderlake/uart.c
index a3bdc4a3ba..46f6220ec3 100644
--- a/src/soc/intel/alderlake/uart.c
+++ b/src/soc/intel/alderlake/uart.c
@@ -17,9 +17,10 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
-const struct uart_gpio_pad_config uart_gpio_pads[] = {
+const struct uart_controller_config uart_ctrlr_config[] = {
 	{
 		.console_index = 0,
+		.devfn = PCH_DEVFN_UART0,
 		.gpios = {
 			PAD_CFG_NF(GPP_H10, NONE, DEEP, NF2), /* UART0 RX */
 			PAD_CFG_NF(GPP_H11, NONE, DEEP, NF2), /* UART0 TX */
@@ -27,6 +28,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 1,
+		.devfn = PCH_DEVFN_UART1,
 		.gpios = {
 			PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* UART1 RX */
 			PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* UART1 TX */
@@ -34,6 +36,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 2,
+		.devfn = PCH_DEVFN_UART2,
 		.gpios = {
 			PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2 RX */
 			PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2 TX */
@@ -41,23 +44,4 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	}
 };
 
-const int uart_max_index = ARRAY_SIZE(uart_gpio_pads);
-
-DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console)
-{
-	/*
-	 * if index is valid, this function will return corresponding structure
-	 * for uart console else will return NULL.
-	 */
-	switch (uart_console) {
-	case 0:
-		return pcidev_path_on_root(PCH_DEVFN_UART0);
-	case 1:
-		return pcidev_path_on_root(PCH_DEVFN_UART1);
-	case 2:
-		return pcidev_path_on_root(PCH_DEVFN_UART2);
-	default:
-		printk(BIOS_ERR, "Invalid UART console index\n");
-		return NULL;
-	}
-}
+const int uart_max_index = ARRAY_SIZE(uart_ctrlr_config);
diff --git a/src/soc/intel/apollolake/uart.c b/src/soc/intel/apollolake/uart.c
index 4e35ee5a0a..28ad71a19d 100644
--- a/src/soc/intel/apollolake/uart.c
+++ b/src/soc/intel/apollolake/uart.c
@@ -11,11 +11,11 @@
 #include <soc/gpio.h>
 #include <soc/pci_devs.h>
 
-/* UART pad configuration. Support RXD and TXD for now. */
-const struct uart_gpio_pad_config uart_gpio_pads[] = {
+const struct uart_controller_config uart_ctrlr_config[] = {
 #if CONFIG(SOC_INTEL_GEMINILAKE)
 	{
 		.console_index = 0,
+		.devfn = PCH_DEVFN_UART0,
 		.gpios = {
 			PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_60, NATIVE, DEEP, NF1,
 				HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */
@@ -26,6 +26,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 2,
+		.devfn = PCH_DEVFN_UART2,
 		.gpios = {
 			PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_64, NATIVE, DEEP, NF1,
 				HIZCRx1, DISPUPD), /* LPSS_UART2_RXD */
@@ -36,6 +37,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 #else
 	{
 		.console_index = 0,
+		.devfn = PCH_DEVFN_UART0,
 		.gpios = {
 			PAD_CFG_NF(GPIO_38, NATIVE, DEEP, NF1), /* UART0 RX */
 			PAD_CFG_NF(GPIO_39, NATIVE, DEEP, NF1), /* UART0 TX */
@@ -43,6 +45,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 1,
+		.devfn = PCH_DEVFN_UART1,
 		.gpios = {
 			PAD_CFG_NF(GPIO_42, NATIVE, DEEP, NF1), /* UART1 RX */
 			PAD_CFG_NF(GPIO_43, NATIVE, DEEP, NF1), /* UART1 TX */
@@ -50,6 +53,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 2,
+		.devfn = PCH_DEVFN_UART2,
 		.gpios = {
 			PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* UART2 RX */
 			PAD_CFG_NF(GPIO_47, NATIVE, DEEP, NF1), /* UART2 TX */
@@ -58,25 +62,4 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 #endif
 };
 
-const int uart_max_index = ARRAY_SIZE(uart_gpio_pads);
-
-DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console)
-{
-	/*
-	 * if index is valid, this function will return corresponding structure
-	 * for uart console else will return NULL.
-	 */
-	switch (uart_console) {
-	case 0:
-		return pcidev_path_on_root(PCH_DEVFN_UART0);
-	case 1:
-		return pcidev_path_on_root(PCH_DEVFN_UART1);
-	case 2:
-		return pcidev_path_on_root(PCH_DEVFN_UART2);
-	case 3:
-		return pcidev_path_on_root(PCH_DEVFN_UART3);
-	default:
-		printk(BIOS_ERR, "Invalid UART console index\n");
-		return NULL;
-	}
-}
+const int uart_max_index = ARRAY_SIZE(uart_ctrlr_config);
diff --git a/src/soc/intel/cannonlake/uart.c b/src/soc/intel/cannonlake/uart.c
index cc0e3a848b..c0d0e49e54 100644
--- a/src/soc/intel/cannonlake/uart.c
+++ b/src/soc/intel/cannonlake/uart.c
@@ -11,9 +11,10 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
-const struct uart_gpio_pad_config uart_gpio_pads[] = {
+const struct uart_controller_config uart_ctrlr_config[] = {
 	{
 		.console_index = 0,
+		.devfn = PCH_DEVFN_UART0,
 		.gpios = {
 			PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0 RX */
 			PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0 TX */
@@ -21,6 +22,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 1,
+		.devfn = PCH_DEVFN_UART1,
 		.gpios = {
 			PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* UART1 RX */
 			PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* UART1 TX */
@@ -28,6 +30,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 2,
+		.devfn = PCH_DEVFN_UART2,
 		.gpios = {
 			PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2 RX */
 			PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2 TX */
@@ -35,23 +38,4 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	}
 };
 
-const int uart_max_index = ARRAY_SIZE(uart_gpio_pads);
-
-DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console)
-{
-	/*
-	 * if index is valid, this function will return corresponding structure
-	 * for uart console else will return NULL.
-	 */
-	switch (uart_console) {
-	case 0:
-		return pcidev_path_on_root(PCH_DEVFN_UART0);
-	case 1:
-		return pcidev_path_on_root(PCH_DEVFN_UART1);
-	case 2:
-		return pcidev_path_on_root(PCH_DEVFN_UART2);
-	default:
-		printk(BIOS_ERR, "Invalid UART console index\n");
-		return NULL;
-	}
-}
+const int uart_max_index = ARRAY_SIZE(uart_ctrlr_config);
diff --git a/src/soc/intel/common/block/include/intelblocks/uart.h b/src/soc/intel/common/block/include/intelblocks/uart.h
index fd65f4c85e..c3a22bc96b 100644
--- a/src/soc/intel/common/block/include/intelblocks/uart.h
+++ b/src/soc/intel/common/block/include/intelblocks/uart.h
@@ -10,8 +10,10 @@
 
 #define MAX_GPIO_PAD_PER_UART		2
 
-struct uart_gpio_pad_config {
+struct uart_controller_config {
 	int console_index;
+	/* devfn in PCI_DEVFN() format */
+	unsigned int devfn;
 	struct pad_config gpios[MAX_GPIO_PAD_PER_UART];
 };
 
@@ -55,21 +57,4 @@ void uart_bootblock_init(void);
  */
 const struct device *uart_get_device(void);
 
-/**************************** SoC callbacks ***********************************/
-
-/*
- * SoC should implement soc_uart_console_to_device() function to
- * get UART debug controller device structure based on console number
- * Caller needs to check proper UART console index supported by SoC.
- * If wrong UART console index is passed to function, it'll return NULL.
- *
- * Input:
- * UART console index selected in config
- *
- * Returns:
- * Pointer to device structure = If device has a UART debug controller.
- * NULL = otherwise
- */
-DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console);
-
 #endif	/* SOC_INTEL_COMMON_BLOCK_UART_H */
diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c
index 1e205ef07f..559ba6da23 100644
--- a/src/soc/intel/common/block/uart/uart.c
+++ b/src/soc/intel/common/block/uart/uart.c
@@ -20,7 +20,7 @@
 #define UART_PCI_ENABLE	(PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER)
 #define UART_CONSOLE_INVALID_INDEX	0xFF
 
-extern const struct uart_gpio_pad_config uart_gpio_pads[];
+extern const struct uart_controller_config uart_ctrlr_config[];
 extern const int uart_max_index;
 
 static void uart_lpss_init(const struct device *dev, uintptr_t baseaddr)
@@ -50,7 +50,7 @@ static int uart_get_valid_index(void)
 	int index;
 
 	for (index = 0; index < uart_max_index; index++) {
-		if (uart_gpio_pads[index].console_index ==
+		if (uart_ctrlr_config[index].console_index ==
 				CONFIG_UART_FOR_CONSOLE)
 			return index;
 	}
@@ -88,7 +88,7 @@ const struct device *uart_get_device(void)
 	int console_index = uart_get_valid_index();
 
 	if (console_index != UART_CONSOLE_INVALID_INDEX)
-		return soc_uart_console_to_device(CONFIG_UART_FOR_CONSOLE);
+		return pcidev_path_on_root(uart_ctrlr_config[console_index].devfn);
 	else
 		return NULL;
 }
@@ -123,7 +123,7 @@ static void uart_configure_gpio_pads(void)
 	int index = uart_get_valid_index();
 
 	if (index != UART_CONSOLE_INVALID_INDEX)
-		gpio_configure_pads(uart_gpio_pads[index].gpios,
+		gpio_configure_pads(uart_ctrlr_config[index].gpios,
 				MAX_GPIO_PAD_PER_UART);
 }
 
diff --git a/src/soc/intel/elkhartlake/uart.c b/src/soc/intel/elkhartlake/uart.c
index cc0e3a848b..c0d0e49e54 100644
--- a/src/soc/intel/elkhartlake/uart.c
+++ b/src/soc/intel/elkhartlake/uart.c
@@ -11,9 +11,10 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
-const struct uart_gpio_pad_config uart_gpio_pads[] = {
+const struct uart_controller_config uart_ctrlr_config[] = {
 	{
 		.console_index = 0,
+		.devfn = PCH_DEVFN_UART0,
 		.gpios = {
 			PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0 RX */
 			PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0 TX */
@@ -21,6 +22,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 1,
+		.devfn = PCH_DEVFN_UART1,
 		.gpios = {
 			PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* UART1 RX */
 			PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* UART1 TX */
@@ -28,6 +30,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 2,
+		.devfn = PCH_DEVFN_UART2,
 		.gpios = {
 			PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2 RX */
 			PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2 TX */
@@ -35,23 +38,4 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	}
 };
 
-const int uart_max_index = ARRAY_SIZE(uart_gpio_pads);
-
-DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console)
-{
-	/*
-	 * if index is valid, this function will return corresponding structure
-	 * for uart console else will return NULL.
-	 */
-	switch (uart_console) {
-	case 0:
-		return pcidev_path_on_root(PCH_DEVFN_UART0);
-	case 1:
-		return pcidev_path_on_root(PCH_DEVFN_UART1);
-	case 2:
-		return pcidev_path_on_root(PCH_DEVFN_UART2);
-	default:
-		printk(BIOS_ERR, "Invalid UART console index\n");
-		return NULL;
-	}
-}
+const int uart_max_index = ARRAY_SIZE(uart_ctrlr_config);
diff --git a/src/soc/intel/icelake/uart.c b/src/soc/intel/icelake/uart.c
index cc0e3a848b..c0d0e49e54 100644
--- a/src/soc/intel/icelake/uart.c
+++ b/src/soc/intel/icelake/uart.c
@@ -11,9 +11,10 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
-const struct uart_gpio_pad_config uart_gpio_pads[] = {
+const struct uart_controller_config uart_ctrlr_config[] = {
 	{
 		.console_index = 0,
+		.devfn = PCH_DEVFN_UART0,
 		.gpios = {
 			PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0 RX */
 			PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0 TX */
@@ -21,6 +22,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 1,
+		.devfn = PCH_DEVFN_UART1,
 		.gpios = {
 			PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* UART1 RX */
 			PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* UART1 TX */
@@ -28,6 +30,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 2,
+		.devfn = PCH_DEVFN_UART2,
 		.gpios = {
 			PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2 RX */
 			PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2 TX */
@@ -35,23 +38,4 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	}
 };
 
-const int uart_max_index = ARRAY_SIZE(uart_gpio_pads);
-
-DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console)
-{
-	/*
-	 * if index is valid, this function will return corresponding structure
-	 * for uart console else will return NULL.
-	 */
-	switch (uart_console) {
-	case 0:
-		return pcidev_path_on_root(PCH_DEVFN_UART0);
-	case 1:
-		return pcidev_path_on_root(PCH_DEVFN_UART1);
-	case 2:
-		return pcidev_path_on_root(PCH_DEVFN_UART2);
-	default:
-		printk(BIOS_ERR, "Invalid UART console index\n");
-		return NULL;
-	}
-}
+const int uart_max_index = ARRAY_SIZE(uart_ctrlr_config);
diff --git a/src/soc/intel/jasperlake/uart.c b/src/soc/intel/jasperlake/uart.c
index cc0e3a848b..c0d0e49e54 100644
--- a/src/soc/intel/jasperlake/uart.c
+++ b/src/soc/intel/jasperlake/uart.c
@@ -11,9 +11,10 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
-const struct uart_gpio_pad_config uart_gpio_pads[] = {
+const struct uart_controller_config uart_ctrlr_config[] = {
 	{
 		.console_index = 0,
+		.devfn = PCH_DEVFN_UART0,
 		.gpios = {
 			PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0 RX */
 			PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0 TX */
@@ -21,6 +22,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 1,
+		.devfn = PCH_DEVFN_UART1,
 		.gpios = {
 			PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* UART1 RX */
 			PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* UART1 TX */
@@ -28,6 +30,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 2,
+		.devfn = PCH_DEVFN_UART2,
 		.gpios = {
 			PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2 RX */
 			PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2 TX */
@@ -35,23 +38,4 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	}
 };
 
-const int uart_max_index = ARRAY_SIZE(uart_gpio_pads);
-
-DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console)
-{
-	/*
-	 * if index is valid, this function will return corresponding structure
-	 * for uart console else will return NULL.
-	 */
-	switch (uart_console) {
-	case 0:
-		return pcidev_path_on_root(PCH_DEVFN_UART0);
-	case 1:
-		return pcidev_path_on_root(PCH_DEVFN_UART1);
-	case 2:
-		return pcidev_path_on_root(PCH_DEVFN_UART2);
-	default:
-		printk(BIOS_ERR, "Invalid UART console index\n");
-		return NULL;
-	}
-}
+const int uart_max_index = ARRAY_SIZE(uart_ctrlr_config);
diff --git a/src/soc/intel/skylake/uart.c b/src/soc/intel/skylake/uart.c
index 28ede6fed4..9e2dcb3b02 100644
--- a/src/soc/intel/skylake/uart.c
+++ b/src/soc/intel/skylake/uart.c
@@ -10,10 +10,10 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
-/* UART pad configuration. Support RXD and TXD for now. */
-const struct uart_gpio_pad_config uart_gpio_pads[] = {
+const struct uart_controller_config uart_ctrlr_config[] = {
 	{
 		.console_index = 0,
+		.devfn = PCH_DEVFN_UART0,
 		.gpios = {
 			PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0 RX */
 			PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0 TX */
@@ -21,6 +21,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 1,
+		.devfn = PCH_DEVFN_UART1,
 		.gpios = {
 			PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* UART1 RX */
 			PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* UART1 TX */
@@ -28,6 +29,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 2,
+		.devfn = PCH_DEVFN_UART2,
 		.gpios = {
 			PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2 RX */
 			PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2 TX */
@@ -35,23 +37,4 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	}
 };
 
-const int uart_max_index = ARRAY_SIZE(uart_gpio_pads);
-
-DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console)
-{
-	/*
-	 * if index is valid, this function will return corresponding structure
-	 * for uart console else will return NULL.
-	 */
-	switch (uart_console) {
-	case 0:
-		return pcidev_path_on_root(PCH_DEVFN_UART0);
-	case 1:
-		return pcidev_path_on_root(PCH_DEVFN_UART1);
-	case 2:
-		return pcidev_path_on_root(PCH_DEVFN_UART2);
-	default:
-		printk(BIOS_ERR, "Invalid UART console index\n");
-		return NULL;
-	}
-}
+const int uart_max_index = ARRAY_SIZE(uart_ctrlr_config);
diff --git a/src/soc/intel/tigerlake/uart.c b/src/soc/intel/tigerlake/uart.c
index 08bfa5402d..5ae54d5093 100644
--- a/src/soc/intel/tigerlake/uart.c
+++ b/src/soc/intel/tigerlake/uart.c
@@ -17,9 +17,10 @@
 #include <soc/pci_devs.h>
 #include <soc/pcr_ids.h>
 
-const struct uart_gpio_pad_config uart_gpio_pads[] = {
+const struct uart_controller_config uart_ctrlr_config[] = {
 	{
 		.console_index = 0,
+		.devfn = PCH_DEVFN_UART0,
 		.gpios = {
 			PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1), /* UART0 RX */
 			PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1), /* UART0 TX */
@@ -27,6 +28,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 1,
+		.devfn = PCH_DEVFN_UART1,
 		.gpios = {
 			PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* UART1 RX */
 			PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), /* UART1 TX */
@@ -34,6 +36,7 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	},
 	{
 		.console_index = 2,
+		.devfn = PCH_DEVFN_UART2,
 		.gpios = {
 			PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* UART2 RX */
 			PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* UART2 TX */
@@ -41,23 +44,4 @@ const struct uart_gpio_pad_config uart_gpio_pads[] = {
 	}
 };
 
-const int uart_max_index = ARRAY_SIZE(uart_gpio_pads);
-
-DEVTREE_CONST struct device *soc_uart_console_to_device(int uart_console)
-{
-	/*
-	 * if index is valid, this function will return corresponding structure
-	 * for uart console else will return NULL.
-	 */
-	switch (uart_console) {
-	case 0:
-		return pcidev_path_on_root(PCH_DEVFN_UART0);
-	case 1:
-		return pcidev_path_on_root(PCH_DEVFN_UART1);
-	case 2:
-		return pcidev_path_on_root(PCH_DEVFN_UART2);
-	default:
-		printk(BIOS_ERR, "Invalid UART console index\n");
-		return NULL;
-	}
-}
+const int uart_max_index = ARRAY_SIZE(uart_ctrlr_config);