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authorFelix Held <felix-coreboot@felixheld.de>2020-12-08 17:39:26 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-12-09 17:42:08 +0000
commit4911c3e352527c19e0bd7a724a4d20b7091a59ad (patch)
tree66c9d4b17d421bf3464fdecc8037fc69cb157b75 /src/soc
parent0645347d0bb71fd5ebe44388dd69a8393fd091ec (diff)
soc/amd/cezanne: call bootblock_main_with_basetime in bootblock_c_entry
Change-Id: Iaac661fcb7581236ace4b5bf057b3e70289f1c8b Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48473 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/cezanne/bootblock.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/bootblock.c b/src/soc/amd/cezanne/bootblock.c
index 3fd567720e..7fe9f81e28 100644
--- a/src/soc/amd/cezanne/bootblock.c
+++ b/src/soc/amd/cezanne/bootblock.c
@@ -2,11 +2,20 @@
#include <amdblocks/amd_pci_mmconf.h>
#include <bootblock_common.h>
+#include <cpu/x86/tsc.h>
#include <stdint.h>
asmlinkage void bootblock_c_entry(uint64_t base_timestamp)
{
enable_pci_mmconf();
+
+ /*
+ * base_timestamp is raw tsc value. We need to divide by tsc_freq_mhz
+ * to get micro-seconds granularity.
+ */
+ base_timestamp /= tsc_freq_mhz();
+
+ bootblock_main_with_basetime(base_timestamp);
}
void bootblock_soc_early_init(void)