diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2022-12-01 15:55:06 -0700 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-01-12 02:54:09 +0000 |
| commit | 47f154c8e593be37ee298e976a37012f44c2a247 (patch) | |
| tree | 46831caa6f1ea5920d63d003ff7ca889a7b02d0a /src/soc | |
| parent | ca025203a84f11f365792919e320e1f57c0a5c50 (diff) | |
soc/intel/common/block: Add Intel VGA early graphics support
This patch introduces an early graphics driver which can be used in
romstage in cache-as-ram mode. The implementation relies on
`libgfxinit' and provide VGA text mode support.
SoCs wanting to take advantage of this driver must implement the
`early_graphics_soc_panel_init' function to set the panel power
sequence timing parameters.
BUG=b:252792591
BRANCH=firmware-brya-14505.B
TEST=Graphics bring up observed on skolas with extra patches
Change-Id: Ie4ad1215e5fadd0adc1271b6bd6ddb0ea258cb5b
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70299
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Maulik Vaghela <maulikvaghela@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
4 files changed, 82 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/graphics/Kconfig b/src/soc/intel/common/block/graphics/Kconfig index 8520e53562..d586fd8ab8 100644 --- a/src/soc/intel/common/block/graphics/Kconfig +++ b/src/soc/intel/common/block/graphics/Kconfig @@ -1,5 +1,6 @@ config SOC_INTEL_COMMON_BLOCK_GRAPHICS bool + select ROMSTAGE_VGA if MAINBOARD_USE_EARLY_LIBGFXINIT help Intel Processor common Graphics support diff --git a/src/soc/intel/common/block/graphics/Makefile.inc b/src/soc/intel/common/block/graphics/Makefile.inc index ac7df44a2f..ac053de838 100644 --- a/src/soc/intel/common/block/graphics/Makefile.inc +++ b/src/soc/intel/common/block/graphics/Makefile.inc @@ -1,2 +1,3 @@ ## SPDX-License-Identifier: GPL-2.0-only +romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS) += early_graphics.c ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS) += graphics.c diff --git a/src/soc/intel/common/block/graphics/early_graphics.c b/src/soc/intel/common/block/graphics/early_graphics.c new file mode 100644 index 0000000000..6f6a421e81 --- /dev/null +++ b/src/soc/intel/common/block/graphics/early_graphics.c @@ -0,0 +1,52 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <device/pci.h> +#include <drivers/intel/gma/libgfxinit.h> +#include <intelblocks/early_graphics.h> +#include <soc/pci_devs.h> + +static bool initialized; + +static void device_init(void) +{ + /* Disable response in IO and MMIO space. */ + pci_and_config16(SA_DEV_IGD, PCI_COMMAND, + ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)); + + /* Program IGD Base Address Register 0. */ + pci_write_config32(SA_DEV_IGD, PCI_BASE_ADDRESS_0, + CONFIG_GFX_GMA_DEFAULT_MMIO); + + /* Enable response in IO and MMIO space. */ + pci_or_config16(SA_DEV_IGD, PCI_COMMAND, + (PCI_COMMAND_IO | PCI_COMMAND_MEMORY)); +} + +bool early_graphics_init(void) +{ + int ret; + + if (!CONFIG(MAINBOARD_USE_EARLY_LIBGFXINIT)) + return false; + + /* Perform minimal graphic MMIO configuration. */ + device_init(); + + /* Configure display panel. */ + early_graphics_soc_panel_init(); + + gma_gfxinit(&ret); + initialized = !!ret; + + return initialized; +} + +void early_graphics_stop(void) +{ + int ret; + + if (!initialized) + return; + + gma_gfxstop(&ret); +} diff --git a/src/soc/intel/common/block/include/intelblocks/early_graphics.h b/src/soc/intel/common/block/include/intelblocks/early_graphics.h new file mode 100644 index 0000000000..c0313cf960 --- /dev/null +++ b/src/soc/intel/common/block/include/intelblocks/early_graphics.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_INTEL_COMMON_BLOCK_GRAPHICS_EARLY_H +#define SOC_INTEL_COMMON_BLOCK_GRAPHICS_EARLY_H + +#include <stdbool.h> + +/* + * SoC override + * + * All new SoC must implement below functionality. + */ + +/* Configure display panel */ +void early_graphics_soc_panel_init(void); + +/* + * Early graphics module API + * Graphics at this stage is limited to VGA text mode. + */ + +/* Initialize graphics. Return true if VGA text mode is ready to use. */ +bool early_graphics_init(void); + +/* Clear graphics configuration, turn off the displays. */ +void early_graphics_stop(void); + +#endif /* SOC_INTEL_COMMON_BLOCK_GRAPHICS_EARLY_H */ |