diff options
| author | Mate Kukri <kukri.mate@gmail.com> | 2020-07-03 14:44:49 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-07-12 19:44:02 +0000 |
| commit | 45b51e01802cbe166ee29c2e27814b9c0ef49c51 (patch) | |
| tree | 38bd6becb9cc0cd52699ee3ddfbecbdd32c01b67 /src/soc | |
| parent | 355d1c9870555f53db2bd3aa4124d25320320dbc (diff) | |
soc/intel/baytrail: Add dedicated devices for MMC and MMC 4.5 controller
- Correctly detect device 17h as the MMC 4.5 controller
- Support detection of the "old" MMC controller at device 10h
Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
Change-Id: I9f0007b1cf01df09f775c088397c3b9c846908c3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43086
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/baytrail/emmc.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/include/soc/pci_devs.h | 13 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/include/soc/pm.h | 3 | ||||
| -rw-r--r-- | src/soc/intel/baytrail/southcluster.c | 12 |
4 files changed, 21 insertions, 9 deletions
diff --git a/src/soc/intel/baytrail/emmc.c b/src/soc/intel/baytrail/emmc.c index 623b149788..e8253e0b2c 100644 --- a/src/soc/intel/baytrail/emmc.c +++ b/src/soc/intel/baytrail/emmc.c @@ -52,5 +52,5 @@ static struct device_operations device_ops = { static const struct pci_driver southcluster __pci_driver = { .ops = &device_ops, .vendor = PCI_VENDOR_ID_INTEL, - .device = MMC_DEVID, + .device = MMC45_DEVID, }; diff --git a/src/soc/intel/baytrail/include/soc/pci_devs.h b/src/soc/intel/baytrail/include/soc/pci_devs.h index 0437b2c598..74acb8ea45 100644 --- a/src/soc/intel/baytrail/include/soc/pci_devs.h +++ b/src/soc/intel/baytrail/include/soc/pci_devs.h @@ -13,6 +13,10 @@ #define GFX_DEV 0x2 #define GFX_FUNC 0 +/* MMC Port */ +#define MMC_DEV 0x10 +#define MMC_FUNC 0 + /* SDIO Port */ #define SDIO_DEV 0x11 #define SDIO_FUNC 0 @@ -33,9 +37,9 @@ #define LPE_DEV 0x15 #define LPE_FUNC 0 -/* MMC Port */ -#define MMC_DEV 0x17 -#define MMC_FUNC 0 +/* MMC45 Port */ +#define MMC45_DEV 0x17 +#define MMC45_FUNC 0 /* Serial IO 1 */ #define SIO1_DEV 0x18 @@ -103,6 +107,7 @@ #define SOC_DEVID 0x0f00 #define GFX_DEVID 0x0f31 +#define MMC_DEVID 0x0f14 #define SDIO_DEVID 0x0f15 #define SD_DEVID 0x0f16 #define IDE1_DEVID 0x0f20 @@ -111,7 +116,7 @@ #define AHCI2_DEVID 0x0f23 #define XHCI_DEVID 0x0f35 #define LPE_DEVID 0x0f28 -#define MMC_DEVID 0x0f50 +#define MMC45_DEVID 0x0f50 #define SIO_DMA1_DEVID 0x0f40 #define I2C1_DEVID 0x0f41 #define I2C2_DEVID 0x0f42 diff --git a/src/soc/intel/baytrail/include/soc/pm.h b/src/soc/intel/baytrail/include/soc/pm.h index 5886fe52ab..dc8a7fadcd 100644 --- a/src/soc/intel/baytrail/include/soc/pm.h +++ b/src/soc/intel/baytrail/include/soc/pm.h @@ -66,9 +66,10 @@ # define HSUART1_DIS (1 << 3) # define HSUART2_DIS (1 << 4) # define SPI_DIS (1 << 5) +# define MMC_DIS (1 << 8) # define SDIO_DIS (1 << 9) # define SD_DIS (1 << 10) -# define MMC_DIS (1 << 11) +# define MMC45_DIS (1 << 11) # define HDA_DIS (1 << 12) # define LPE_DIS (1 << 13) # define OTG_DIS (1 << 14) diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 9a297aadf8..a836d41e59 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -204,6 +204,9 @@ static void sc_disable_devfn(struct device *dev) uint32_t mask2 = 0; switch (dev->path.pci.devfn) { + case PCI_DEVFN(MMC_DEV, MMC_FUNC): + mask |= MMC_DIS; + break; case PCI_DEVFN(SDIO_DEV, SDIO_FUNC): mask |= SDIO_DIS; break; @@ -221,8 +224,8 @@ static void sc_disable_devfn(struct device *dev) case PCI_DEVFN(LPE_DEV, LPE_FUNC): mask |= LPE_DIS; break; - case PCI_DEVFN(MMC_DEV, MMC_FUNC): - mask |= MMC_DIS; + case PCI_DEVFN(MMC45_DEV, MMC45_FUNC): + mask |= MMC45_DIS; break; case PCI_DEVFN(SIO_DMA1_DEV, SIO_DMA1_FUNC): mask |= SIO_DMA1_DIS; @@ -362,13 +365,16 @@ static int place_device_in_d3hot(struct device *dev) * Work around this by hard coding the offset. */ switch (dev->path.pci.devfn) { + case PCI_DEVFN(MMC_DEV, MMC_FUNC): + offset = 0x80; + break; case PCI_DEVFN(SDIO_DEV, SDIO_FUNC): offset = 0x80; break; case PCI_DEVFN(SD_DEV, SD_FUNC): offset = 0x80; break; - case PCI_DEVFN(MMC_DEV, MMC_FUNC): + case PCI_DEVFN(MMC45_DEV, MMC45_FUNC): offset = 0x80; break; case PCI_DEVFN(LPE_DEV, LPE_FUNC): |