diff options
| author | Julius Werner <jwerner@chromium.org> | 2023-11-09 12:06:56 -0800 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2023-11-11 16:26:14 +0000 |
| commit | 2a87ef1eca56ed6b215bd6c4e0beabab670434ee (patch) | |
| tree | 204cef1af132c1604fff271d9c44f04a58946ea9 /src/soc | |
| parent | d4d40c64e102d99acf63b673af4c7e41f10b4de9 (diff) | |
rockchip/rk3288: Reshuffle memlayout to make a bit more verstage space
RK3288 is bursting at the seams again. This patch reshuffles two more
kilobytes to verstage to make things fit a little better.
Change-Id: I5e7667061dce3d02441be83c0b8fb81500a1b1a3
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78970
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-by: Maximilian Brune <maximilian.brune@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/rockchip/rk3288/memlayout.ld | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/soc/rockchip/rk3288/memlayout.ld b/src/soc/rockchip/rk3288/memlayout.ld index ea69a42704..4c0dea2d42 100644 --- a/src/soc/rockchip/rk3288/memlayout.ld +++ b/src/soc/rockchip/rk3288/memlayout.ld @@ -17,13 +17,13 @@ SECTIONS SRAM_START(0xFF700000) TTB(0xFF700000, 16K) - BOOTBLOCK(0xFF704004, 16K - 4) - PRERAM_CBMEM_CONSOLE(0xFF708000, 1K) - VBOOT2_WORK(0xFF708400, 12K) - OVERLAP_VERSTAGE_ROMSTAGE(0xFF70B400, 47K + 768) - PRERAM_CBFS_CACHE(0xFF717300, 256) + BOOTBLOCK(0xFF704004, 15K - 4) + PRERAM_CBMEM_CONSOLE(0xFF707C00, 1K) + VBOOT2_WORK(0xFF708000, 12K) + OVERLAP_VERSTAGE_ROMSTAGE(0xFF70B000, 49K) TIMESTAMP(0xFF717400, 0x180) - STACK(0xFF717580, 3K - 0x180) + PRERAM_CBFS_CACHE(0xFF717580, 0x100) + STACK(0xFF717680, 3K - 0x280) SRAM_END(0xFF718000) /* 4K of special SRAM in PMU power domain. |