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authorEran Mitrani <mitrani@google.com>2022-12-19 11:27:10 -0800
committerSubrata Banik <subratabanik@google.com>2023-02-28 08:54:17 +0000
commit222903e57a497f6d4b1b293e713caab66a23d862 (patch)
treee417610791a67e936a88cb749606eaea782d717a /src/soc
parentb40b2b1933934d93f88542518415458583c80e47 (diff)
soc/intel/meteorlake: Hook up FSP hyper-threading setting to option API
Select `HAVE_HYPERTHREADING` and hook up the hyper-threading setting from the FSP to the option API so that related mainboards don't have to do that. Unless otherwise configured (e.g. the CMOS setting or overridden by the mainboard code), the value from the Kconfig setting `FSP_HYPERTHREADING` is used. Port of commit a182faeb88a0 ("soc/intel/alderlake: Hook up FSP hyper-threading setting to option API") Change-Id: I0b3e1a4049312c6b1ec950382c92274e0350001f Signed-off-by: Eran Mitrani <mitrani@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71115 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/intel/meteorlake/Kconfig1
-rw-r--r--src/soc/intel/meteorlake/romstage/fsp_params.c4
2 files changed, 3 insertions, 2 deletions
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 27d154b754..03951cc963 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -30,6 +30,7 @@ config CPU_SPECIFIC_OPTIONS
select GENERIC_GPIO_LIB
select HAVE_DEBUG_RAM_SETUP
select HAVE_FSP_GOP
+ select HAVE_HYPERTHREADING
select HAVE_INTEL_COMPLIANCE_TEST_MODE
select HAVE_SMI_HANDLER
select IDT_IN_EVERY_STAGE
diff --git a/src/soc/intel/meteorlake/romstage/fsp_params.c b/src/soc/intel/meteorlake/romstage/fsp_params.c
index 25c44c672e..ec5a3af4bb 100644
--- a/src/soc/intel/meteorlake/romstage/fsp_params.c
+++ b/src/soc/intel/meteorlake/romstage/fsp_params.c
@@ -10,6 +10,7 @@
#include <fsp/util.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/pcie_rp.h>
+#include <option.h>
#include <soc/gpio_soc_defs.h>
#include <soc/iomap.h>
#include <soc/msr.h>
@@ -140,8 +141,7 @@ static void fill_fspm_cpu_params(FSP_M_CONFIG *m_cfg,
m_cfg->CpuRatio = (rdmsr(MSR_FLEX_RATIO).lo >> 8) & 0xff;
m_cfg->PrmrrSize = get_valid_prmrr_size();
- /* Enable Hyper Threading */
- m_cfg->HyperThreading = 1;
+ m_cfg->HyperThreading = get_uint_option("hyper_threading", CONFIG(FSP_HYPERTHREADING));
}
static void fill_fspm_security_params(FSP_M_CONFIG *m_cfg,