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authorFelix Held <felix-coreboot@felixheld.de>2020-12-08 17:34:59 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-12-09 18:44:51 +0000
commit10252035cec317565faf76a92f3312a6f52876b6 (patch)
tree97049441a4572920f5bdb17596fca06d37b81690 /src/soc
parent153f92adbed953c068b09b3ef7d9f5369488c13c (diff)
soc/amd/cezanne: print APU family and model in bootblock_soc_init
Change-Id: I457188c905167affc1ebcea835a36df822ecb23c Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/48476 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/cezanne/bootblock.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/amd/cezanne/bootblock.c b/src/soc/amd/cezanne/bootblock.c
index 8e1bff0fbf..9fb99bdca2 100644
--- a/src/soc/amd/cezanne/bootblock.c
+++ b/src/soc/amd/cezanne/bootblock.c
@@ -2,6 +2,7 @@
#include <amdblocks/amd_pci_mmconf.h>
#include <bootblock_common.h>
+#include <console/console.h>
#include <cpu/x86/tsc.h>
#include <soc/southbridge.h>
#include <stdint.h>
@@ -26,5 +27,7 @@ void bootblock_soc_early_init(void)
void bootblock_soc_init(void)
{
+ u32 val = cpuid_eax(1);
+ printk(BIOS_DEBUG, "Family_Model: %08x\n", val);
fch_early_init();
}